[PATCH v3 0/4] arm64: Large PIE fixes

[Michal Simek]

Hi,

On 09. 09. 20 19:07, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias at xilinx.com>
> 
> This fixes some build issues with large (> 1MB) PIE U-Boot setups.
> We also document the 4K aligned load address requirement and
> add an early run-time check for it.
> 
> As requested by reviewers, I've also added a runtime check for
> non-PIE builds to trap the startup sequence early if the start
> address doesn't match between run-time and link-time.
> 
> Cheers,
> Edgar
> 
> ChangeLog:
> v2 -> v3:
> * Add non-PIE start address (run vs link-time) check
> * Move 4K aligment Kconfig help description
> * Fix load of __bss_start
> * Use x0 rather than x1 in PIE load-address check
> * Add missing tabs
> * Add load-address check for non-PIE
> * U-boot -> U-Boot in a few places
> * Tweak commit messages
> 
> v1 -> v2:
> * Fix adr of _start in arch/arm/lib/crt0_64.S
> * Add early check and bail out into a WFI loop when not 4K aligned
> * Document the 4K alignement requirement in Kconfig
> 
> Edgar E. Iglesias (4):
>   arm64: Mention 4K aligned load addresses in the PIE Kconfig help
>   arm64: Trap PIE builds early if load address is not 4K aligned
>   arm64: Add support for larger PIE U-Boot
>   arm64: Trap non-PIE builds early if starting from wrong address
> 
>  arch/arm/Kconfig           |  4 ++--
>  arch/arm/cpu/armv8/start.S | 36 ++++++++++++++++++++++++++++++++++--
>  arch/arm/lib/crt0_64.S     |  8 +++++++-
>  3 files changed, 43 insertions(+), 5 deletions(-)
> 

Because these changes are made for supporting Xilinx SOCs 1-3 applied to
my tree. Patch 4 is dropped as was agreed.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs