[PATCH] ARM: mx6: ddr: Add support for iMX6UL/ULL/SL/SDL

[Fabio Estevam]

Hi Marek,

On Sat, Sep 12, 2020 at 8:35 PM Marek Vasut <marex at denx.de> wrote:
>
> This patch adds support for iMX6UL/ULL/SL/SDL MMDC into the DDR calibration
> code. The difference between MX6DQ and MX6UL/ULL/SL is that the later SoCs
> have 2 SDQS registers, just like MX6SX, while the MX6DQ/MX6SDL has 8.
>
> Fixes: 4f4c128c65 ("ARM: mx6: ddr: Add support for iMX6SX")
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Eric Nelson <eric at nelint.com>
> Cc: Fabio Estevam <fabio.estevam at nxp.com>
> Cc: Stefano Babic <sbabic at denx.de>

Reviewed-by: Fabio Estevam <festevam at gmail.com>