[PATCH v2 4/7] riscv: Clear pending IPIs on initialization
Sean Anderson
seanga2 at gmail.com
Mon Sep 14 16:23:00 CEST 2020
Even though we no longer call smp_function if an IPI was not sent by
U-Boot, we still need to clear any IPIs which were pending from the
execution environment. Otherwise, secondary harts will busy-wait in
secondary_hart_loop, instead of relaxing.
Signed-off-by: Sean Anderson <seanga2 at gmail.com>
Reviewed-by: Bin Meng <bin.meng at windriver.com>
---
Changes in v2:
- Make riscv_ipi_init_secondary_hart static
arch/riscv/cpu/cpu.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index bfa2d4a426..ab08af5a33 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -72,6 +72,15 @@ static int riscv_cpu_probe(void)
return 0;
}
+/*
+ * This is called on secondary harts just after the IPI is init'd. Currently
+ * there's nothing to do, since we just need to clear any existing IPIs, and
+ * that is handled by the sending of an ipi itself.
+ */
+static void riscv_ipi_init_secondary_hart(ulong hart, ulong arg0, ulong arg1)
+{
+}
+
int arch_cpu_init_dm(void)
{
int ret;
@@ -111,6 +120,15 @@ int arch_cpu_init_dm(void)
ret = riscv_init_ipi();
if (ret)
return ret;
+
+ /*
+ * Clear all pending IPIs on secondary harts. We don't do anything on
+ * the boot hart, since we never send an IPI to ourselves, and no
+ * interrupts are enabled
+ */
+ ret = smp_call_function((ulong)riscv_ipi_init_secondary_hart, 0, 0, 0);
+ if (ret)
+ return ret;
#endif
return 0;
--
2.28.0
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