[PATCH 03/13] usb: ehci-mx6: Add i.MX8 OTG controller support

[Marek Vasut]

On 9/16/20 2:56 PM, peng.fan at nxp.com wrote:
[...]
> +++ b/arch/arm/include/asm/arch-imx8/clock.h
> @@ -24,4 +24,12 @@ enum mxc_clock {
>  
>  u32 mxc_get_clock(enum mxc_clock clk);
>  
> +#define PLL_USB_EN_USB_CLKS_MASK	(1 << 6)

Use BIT(6)

[...]

> +++ b/drivers/usb/host/ehci-mx6.c
> @@ -67,7 +67,7 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define UCMD_RUN_STOP           (1 << 0) /* controller run/stop */
>  #define UCMD_RESET		(1 << 1) /* controller reset */
>  
> -#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP)
> +#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8)
>  static const ulong phy_bases[] = {
>  	USB_PHY0_BASE_ADDR,
>  #if defined(USB_PHY1_BASE_ADDR)
> @@ -101,7 +101,44 @@ static void usb_power_config(int index)
>  		   &usbphy->usb1_chrg_detect);
>  
>  	scg_enable_usb_pll(true);
> +#elif defined(CONFIG_IMX8)
> +	struct usbphy_regs __iomem *usbphy = (struct usbphy_regs __iomem *)USB_PHY0_BASE_ADDR;
> +	int ret;
> +	u32 val;
> +
> +	if (index > 0)
> +		return;
> +
> +	writel(ANADIG_USB2_CHRG_DETECT_EN_B | ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
> +	       &usbphy->usb1_chrg_detect);

Can the ANATOP stuff be made into separate driver finally ?
It seems the USB driver is doing too much unrelated work already.