[PATCH] spi: octeon_spi: Use a fixed 100MHz input clock on Octeon TX2

[Stefan Roese]

Hi Jagan,

On 26.08.20 12:03, Stefan Roese wrote:
> Hi Jagan,
> 
> On 05.08.20 15:07, Stefan Roese wrote:
>> Octeon TX2 sets the TB100_EN bit in the config register. We need to use
>> a fixed 100MHz clock for this as well to work properly.
>>
>> Signed-off-by: Stefan Roese <sr at denx.de>
>> Cc: Aaron Williams <awilliams at marvell.com>
>> Cc: Suneel Garapati <sgarapati at marvell.com>
>> Cc: Chandrakala Chavva <cchavva at marvell.com>
>> Cc: Jagan Teki <jagan at amarulasolutions.com>
>> ---
>>   drivers/spi/octeon_spi.c | 5 ++++-
>>   1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/spi/octeon_spi.c b/drivers/spi/octeon_spi.c
>> index 83fe6330a1..7e88e5580f 100644
>> --- a/drivers/spi/octeon_spi.c
>> +++ b/drivers/spi/octeon_spi.c
>> @@ -519,7 +519,10 @@ static int octeon_spi_set_speed(struct udevice 
>> *bus, uint max_hz)
>>       if (max_hz > OCTEON_SPI_MAX_CLOCK_HZ)
>>           max_hz = OCTEON_SPI_MAX_CLOCK_HZ;
>> -    clk_rate = clk_get_rate(&priv->clk);
>> +    if (device_is_compatible(bus, "cavium,thunderx-spi"))
>> +        clk_rate = 100000000;
>> +    else
>> +        clk_rate = clk_get_rate(&priv->clk);
>>       if (IS_ERR_VALUE(clk_rate))
>>           return -EINVAL;
> 
> Any updates on this? Are you okay with this patch and plan to push
> it upstream soon? Or should I pull it with your Acked-by?

Ping!

Thanks,
Stefan