Pull request: u-boot-riscv/next 20200930
uboot at andestech.com
uboot at andestech.com
Wed Sep 30 08:52:43 CEST 2020
Hi Tom,
This PR is for -next
Please pull some riscv updates:
- Disable CMD_IRQ for RISC-V.
- Update sipeed/maix doc
- Obtain reg of SiFive RAM via dev_read_addr_index() instead of regmap API.
- Cleans up RISC-V timer drivers and converts them to DM.
- Correctly handle IPIs already pending upon prior stage bootloader (on the K210)
Thanks
Rick
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/731148651
The following changes since commit 0ac83d080a0044cd0d8f782ba12f02cf969d3004:
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next (2020-09-25 09:04:01 -0400)
are available in the Git repository at:
git at gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 924de3216e9efdf1cdc71b8632099213aac03f2c:
riscv: Add some comments to start.S (2020-09-30 08:54:52 +0800)
----------------------------------------------------------------
Bin Meng (2):
ram: sifive: Check return value on clk_enable()
ram: sifive: Remove regmap dependency
Heinrich Schuchardt (2):
doc: correct kflash settings for Maix One Dock
doc/sipeed/maix: describe RESET and BOOT button
Pragnesh Patel (1):
cmd: irq: disable CMD_IRQ for riscv arch
Sean Anderson (16):
riscv: Rework riscv timer driver to only support S-mode
timer: Add helper for drivers using timebase fallback
timer: Add a test for timer_timebase_fallback
riscv: Rework Andes PLMT as a UCLASS_TIMER driver
riscv: Clean up initialization in Andes PLIC
riscv: Rework Sifive CLINT as UCLASS_TIMER driver
riscv: clk: Add CLINT clock to kendryte clock driver
riscv: Update Kendryte device tree for new CLINT driver
riscv: Update SiFive device tree for new CLINT driver
Revert "riscv: Clear pending interrupts before enabling IPIs"
riscv: Match memory barriers between send_ipi_many and handle_ipi
riscv: Use a valid bit to ignore already-pending IPIs
riscv: Clear pending IPIs on initialization
riscv: Consolidate fences into AMOs for available_harts_lock
riscv: Ensure gp is NULL or points to valid data
riscv: Add some comments to start.S
arch/riscv/Kconfig | 16 ----------------
arch/riscv/cpu/ax25/Kconfig | 2 +-
arch/riscv/cpu/cpu.c | 20 ++++++++++++++++++++
arch/riscv/cpu/fu540/Kconfig | 2 +-
arch/riscv/cpu/generic/Kconfig | 2 +-
arch/riscv/cpu/start.S | 58 +++++++++++++++++++++++++++++++++++++++++++++-------------
arch/riscv/dts/fu540-c000-u-boot.dtsi | 8 ++++++--
arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 4 ++++
arch/riscv/dts/k210.dtsi | 7 ++++---
arch/riscv/include/asm/global_data.h | 3 ---
arch/riscv/include/asm/smp.h | 7 +++++++
arch/riscv/include/asm/syscon.h | 4 ++--
arch/riscv/lib/Makefile | 1 -
arch/riscv/lib/andes_plic.c | 58 +++++++++++++++++++++++++---------------------------------
arch/riscv/lib/andes_plmt.c | 44 +++++++++++++++++++++-----------------------
arch/riscv/lib/interrupts.c | 3 ++-
arch/riscv/lib/rdtime.c | 38 --------------------------------------
arch/riscv/lib/sifive_clint.c | 62 ++++++++++++++++++++++++++++++++++----------------------------
arch/riscv/lib/smp.c | 16 +++++++++++++++-
arch/sandbox/dts/test.dts | 9 ++++++++-
arch/sandbox/include/asm/cpu.h | 11 +++++++++++
cmd/Kconfig | 2 +-
doc/board/sipeed/maix.rst | 10 +++++++---
drivers/clk/kendryte/clk.c | 4 ++++
drivers/cpu/cpu_sandbox.c | 39 ++++++++++++++++++++++++++++++++-------
drivers/ram/sifive/fu540_ddr.c | 17 ++++++++---------
drivers/timer/Kconfig | 4 ++--
drivers/timer/riscv_timer.c | 39 ++++++++++++++++++++-------------------
drivers/timer/sandbox_timer.c | 4 +++-
drivers/timer/timer-uclass.c | 31 +++++++++++++++++++++++++++++++
include/dt-bindings/clock/k210-sysctl.h | 1 +
include/timer.h | 15 +++++++++++++++
test/dm/timer.c | 27 ++++++++++++++++++++++++++-
33 files changed, 357 insertions(+), 211 deletions(-)
delete mode 100644 arch/riscv/lib/rdtime.c
create mode 100644 arch/sandbox/include/asm/cpu.h
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