[PATCH] net: e1000: add defaults for i210 TX/RX PBSIZE

Tom Rini trini at konsulko.com
Wed Sep 30 22:54:43 CEST 2020


On Wed, Sep 23, 2020 at 05:05:44PM +0200, Christian Gmeiner wrote:

> Set the defaults on probe for the packet buffer size registers
> for the i210.
> 
> The TXPBSIZE register of the i210 resets to its default value only
> at power-on. It doesn't reset if you reboot the system, only if you
> pull power. If something (another driver, another OS, etc.) modifies
> this register from its default value, the e1000 driver doesn't function
> correctly. It detects a hang of the transmitter and continuously resets
> the adapter. Here we set this value to its default when resetting the
> i210 to resolve this issue.
> 
> Signed-off-by: Christian Gmeiner <christian.gmeiner at gmail.com>
> ---
>  drivers/net/e1000.c | 5 +++++
>  drivers/net/e1000.h | 6 ++++++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
> index 49be766702..38872a6943 100644
> --- a/drivers/net/e1000.c
> +++ b/drivers/net/e1000.c
> @@ -1644,6 +1644,11 @@ e1000_reset_hw(struct e1000_hw *hw)
>  	E1000_WRITE_REG(hw, TCTL, E1000_TCTL_PSP);
>  	E1000_WRITE_FLUSH(hw);
>  
> +	if (hw->mac_type == e1000_igb) {
> +		E1000_WRITE_REG(hw, E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
> +		E1000_WRITE_REG(hw, E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
> +	}
> +
>  	/* The tbi_compatibility_on Flag must be cleared when Rctl is cleared. */
>  	hw->tbi_compatibility_on = false;
>  
> diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
> index 19ed4777d9..ceba109ad2 100644
> --- a/drivers/net/e1000.h
> +++ b/drivers/net/e1000.h
> @@ -735,6 +735,7 @@ struct e1000_ffvt_entry {
>  #define E1000_ERT      0x02008  /* Early Rx Threshold - RW */
>  #define E1000_FCRTL    0x02160	/* Flow Control Receive Threshold Low - RW */
>  #define E1000_FCRTH    0x02168	/* Flow Control Receive Threshold High - RW */
> +#define E1000_RXPBS    0x02404  /* Rx Packet Buffer Size - RW */
>  #define E1000_RDBAL    0x02800	/* RX Descriptor Base Address Low - RW */
>  #define E1000_RDBAH    0x02804	/* RX Descriptor Base Address High - RW */
>  #define E1000_RDLEN    0x02808	/* RX Descriptor Length - RW */
> @@ -745,6 +746,7 @@ struct e1000_ffvt_entry {
>  #define E1000_RADV     0x0282C	/* RX Interrupt Absolute Delay Timer - RW */
>  #define E1000_RSRPD    0x02C00	/* RX Small Packet Detect - RW */
>  #define E1000_TXDMAC   0x03000	/* TX DMA Control - RW */
> +#define E1000_TXPBS	   0x03404  /* Tx Packet Buffer Size - RW */
>  #define E1000_TDFH     0x03410  /* TX Data FIFO Head - RW */
>  #define E1000_TDFT     0x03418  /* TX Data FIFO Tail - RW */
>  #define E1000_TDFHS    0x03420  /* TX Data FIFO Head Saved - RW */
> @@ -2589,4 +2591,8 @@ struct e1000_hw {
>  
>  #define E1000_CTRL_EXT_INT_TIMER_CLR  0x20000000 /* Clear Interrupt timers
>  							after IMS clear */
> +
> +#define I210_RXPBSIZE_DEFAULT		0x000000A2 /* RXPBSIZE default */
> +#define I210_TXPBSIZE_DEFAULT		0x04000014 /* TXPBSIZE default */
> +
>  #endif	/* _E1000_HW_H_ */

This introduces a failure to build on numerous platforms including
ls1043aqds.

-- 
Tom
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