[v1 02/17] arm: socfpga: Add base address for Intel N5X device
Tan, Ley Foon
ley.foon.tan at intel.com
Mon Apr 5 08:57:29 CEST 2021
> -----Original Message-----
> From: Lim, Elly Siew Chin <elly.siew.chin.lim at intel.com>
> Sent: Wednesday, March 31, 2021 10:39 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex at denx.de>; Tan, Ley Foon
> <ley.foon.tan at intel.com>; See, Chin Liang <chin.liang.see at intel.com>;
> Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> <tien.fong.chee at intel.com>; Westergreen, Dalon
> <dalon.westergreen at intel.com>; Simon Glass <sjg at chromium.org>; Gan,
> Yau Wai <yau.wai.gan at intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim at intel.com>
> Subject: [v1 02/17] arm: socfpga: Add base address for Intel N5X device
>
> Reuse base_addr_soc64.h for Intel N5X device, the address is the same as
> Agilex.
>
> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim at intel.com>
> ---
> arch/arm/mach-socfpga/include/mach/base_addr_soc64.h | 3 ++-
Reviewed-by: Ley Foon Tan <ley.foon.tan at intel.com>
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