[PATCH v3 10/11] riscv: k210: Use AI as the parent clock of aisram, not PLL1
Sean Anderson
seanga2 at gmail.com
Fri Apr 9 04:13:12 CEST 2021
Testing showed that disabling AI while leaving PLL1 enabled disabled the
aisram. This suggests that AI is a more appropriate clock for that ram
bank.
Signed-off-by: Sean Anderson <seanga2 at gmail.com>
---
(no changes since v2)
Changes in v2:
- New
arch/riscv/dts/k210.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 2032f1e5c2..75e101530b 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -89,7 +89,7 @@
reg-names = "sram0", "sram1", "aisram";
clocks = <&sysclk K210_CLK_SRAM0>,
<&sysclk K210_CLK_SRAM1>,
- <&sysclk K210_CLK_PLL1>;
+ <&sysclk K210_CLK_AI>;
clock-names = "sram0", "sram1", "aisram";
u-boot,dm-pre-reloc;
};
--
2.31.0
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