[PATCH 1/2] mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output

sbabic at denx.de sbabic at denx.de
Fri Apr 9 13:24:53 CEST 2021

> From: Haibo Chen <haibo.chen at nxp.com>
> For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these
> are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the
> card clock output.
> After commit b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support"),
> we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because
> the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during
> voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON,
> after CMD11, hardware will gate off the card clock automatically, so card do
> not detect the clock off/on behavior, so will draw the data0 line low until
> next command.
> Fixes: b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support")
> Tested-by: Tim Harvey <tharvey at gateworks.com>
> Signed-off-by: Haibo Chen <haibo.chen at nxp.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de

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