[PATCH v3 05/11] clk: k210: Move the clint clock to under aclk

Damien Le Moal Damien.LeMoal at wdc.com
Fri Apr 9 04:54:01 CEST 2021


On 2021/04/09 11:13, Sean Anderson wrote:
> No other (real) clocks have the cpu clock as their parent; instead they are
> children of aclk. Move the clint clock under aclk to match them.
> 
> Signed-off-by: Sean Anderson <seanga2 at gmail.com>
> ---
> 
> (no changes since v2)
> 
> Changes in v2:
> - New
> 
>  drivers/clk/kendryte/clk.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/kendryte/clk.c b/drivers/clk/kendryte/clk.c
> index ab86533bb4..5091f07eb0 100644
> --- a/drivers/clk/kendryte/clk.c
> +++ b/drivers/clk/kendryte/clk.c
> @@ -643,7 +643,7 @@ static int k210_clk_probe(struct udevice *dev)
>  
>  	/* The MTIME register in CLINT runs at one 50th the CPU clock speed */
>  	clk_dm(K210_CLK_CLINT,
> -	       clk_register_fixed_factor(NULL, "clint", "cpu", 0, 1, 50));
> +	       clk_register_fixed_factor(NULL, "clint", "aclk", 0, 1, 50));
>  
>  	return 0;
>  }
> 

Looks good, but representing this clock is in fact useless, at least in Linux,
since the clint driver does not use it directly and derives its rate from
riscv_timebase which is set from the timebase-frequency DT property.

Not sure how u-boot handles that though. Since your code allows changing the
PLLs frequency, the timebase-frequency property may end up being buggy if it is
not changed too.

-- 
Damien Le Moal
Western Digital Research


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