[RFC PATCH v5 0/2] arch: riscv: cpu: Add callback to init each core

Green Wan green.wan at sifive.com
Tue Apr 13 11:31:55 CEST 2021

Add a callback interface, harts_early_init() to perform riscv CPU 
hart-dependent configuration for each hart. harts_early_init() is
placed after stack of harts are initialized and before main boot hart is
picked up. Several conditions should be aware of or avoided are listed:

  - cannot access gd
    At the moment, gd hasn't initialized yet.

  - all operations in harts_early_init() should only affect core itself
    For example, the operations for board level should be moved to mach_xxx()
    or board_init_xxx() functions instead.

  - Common resource need protection if multicore
    Since all harts might enter harts_early_init() in parallel, common
    resource need a mechanism to handle race condition.

  - A reference implementation is added in ./arch/riscv/cpu/cpu.c
    The implementation is declared with '__weak' and can be overridden.

  - rename riscv_hart_early_init to harts_early_init
  - rephrase dummy for harts_early_init() to callback but keep current
    comments not specific for customizing CSRs only.
  - Fix nit in [2/2] and add reviewed-by
  - Revising the comments for riscv_hart_early_init() in [1/2]
  - Remove unnecessary braces and add reviewed-by in [2/2]

Green Wan (2):
  arch: riscv: cpu: Add callback to init each core
  board: sifive: unmatched: clear feature disable CSR

 arch/riscv/cpu/cpu.c         | 15 +++++++++++++++
 arch/riscv/cpu/start.S       | 14 ++++++++++++++
 board/sifive/unmatched/spl.c | 15 +++++++++++++++
 3 files changed, 44 insertions(+)


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