[PATCH 01/13] pci: Update the highest subordinate bus number for bridge setup

Masami Hiramatsu masami.hiramatsu at linaro.org
Fri Apr 16 02:14:49 CEST 2021


Hi Tim,

Sorry for confusion. It may be my git configuration issue.
It seems not to correctly send the series to the SMTP server.
Here is the patch.

Thank you,

2021年4月16日(金) 0:07 Tim Harvey <tharvey at gateworks.com>:
>
> On Wed, Apr 14, 2021 at 12:38 PM Simon Glass <sjg at chromium.org> wrote:
> >
> > On Tue, 13 Apr 2021 at 16:21, Masami Hiramatsu
> > <masami.hiramatsu at linaro.org> wrote:
> > >
> > > Update the highest subordinate bus number after probing the devices
> > > under the bus for setting up the bridge correctly.
> > > The commit 42f3663a3f67 ("pci: Update to use new sequence numbers")
> > > removed this but it is required if a PCIe bridge is under the bus.
> > >
> > > Fixes: 42f3663a3f67 ("pci: Update to use new sequence numbers")
> > > Signed-off-by: Masami Hiramatsu <masami.hiramatsu at linaro.org>
> > > ---
> > >  drivers/pci/pci-uclass.c |    3 +++
> > >  1 file changed, 3 insertions(+)
> >
> > Reviewed-by: Simon Glass <sjg at chromium.org>
> >
> > Can we add a test for this?
>
> Simon / Masami,
>
> I ran into this regression as well and likely need the same patch. My
> mailer did not receive the original patch and I can't seem to find it
> anywhere, can you please resend this?
>
> Best regards,
>
> Tim



-- 
Masami Hiramatsu
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