[v1 11/17] ddr: socfpga: Enable memory test on memory size less than 1GB

Chee, Tien Fong tien.fong.chee at intel.com
Fri Apr 16 08:35:59 CEST 2021


Hi Ley Foon,

> -----Original Message-----
> From: Tan, Ley Foon <ley.foon.tan at intel.com>
> Sent: Friday, 9 April, 2021 1:54 PM
> To: Lim, Elly Siew Chin <elly.siew.chin.lim at intel.com>; u-boot at lists.denx.de
> Cc: Marek Vasut <marex at denx.de>; See, Chin Liang
> <chin.liang.see at intel.com>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> <tien.fong.chee at intel.com>; Westergreen, Dalon
> <dalon.westergreen at intel.com>; Simon Glass <sjg at chromium.org>; Gan,
> Yau Wai <yau.wai.gan at intel.com>
> Subject: RE: [v1 11/17] ddr: socfpga: Enable memory test on memory size less
> than 1GB
> 
> 
> 
> > -----Original Message-----
> > From: Lim, Elly Siew Chin <elly.siew.chin.lim at intel.com>
> > Sent: Wednesday, March 31, 2021 10:39 PM
> > To: u-boot at lists.denx.de
> > Cc: Marek Vasut <marex at denx.de>; Tan, Ley Foon
> > <ley.foon.tan at intel.com>; See, Chin Liang <chin.liang.see at intel.com>;
> > Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> > <tien.fong.chee at intel.com>; Westergreen, Dalon
> > <dalon.westergreen at intel.com>; Simon Glass <sjg at chromium.org>; Gan,
> > Yau Wai <yau.wai.gan at intel.com>
> > Subject: [v1 11/17] ddr: socfpga: Enable memory test on memory size
> > less than 1GB
> >
> > From: Tien Fong Chee <tien.fong.chee at intel.com>
> >
> > Minimum 1GB memory size is required in current memory test, so this
> > patch improves the memory test for processing memory size less than
> > 1GB, and the size in power of two.
> >
> > Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
> > ---
> >  drivers/ddr/altera/sdram_soc64.c | 18 ++++++++++++++++--
> >  1 file changed, 16 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/ddr/altera/sdram_soc64.c
> > b/drivers/ddr/altera/sdram_soc64.c
> > index a08f0953e5..171cde0e6b 100644
> > --- a/drivers/ddr/altera/sdram_soc64.c
> > +++ b/drivers/ddr/altera/sdram_soc64.c
> > @@ -182,6 +182,7 @@ void sdram_size_check(struct bd_info *bd)
> >  	phys_size_t total_ram_check = 0;
> >  	phys_size_t ram_check = 0;
> >  	phys_addr_t start = 0;
> > +	phys_size_t size, total_size;
> 
> Use "remaining_size" is more suitable.

Okay

> 
> >  	int bank;
> >
> >  	/* Sanity check ensure correct SDRAM size specified */ @@ -189,10
> > +190,23 @@ void sdram_size_check(struct bd_info *bd)
> >
> >  	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
> >  		start = bd->bi_dram[bank].start;
> > +		total_size = bd->bi_dram[bank].size;
> >  		while (ram_check < bd->bi_dram[bank].size) {
> > -			ram_check += get_ram_size((void *)(start +
> > ram_check),
> > -						 (phys_size_t)SZ_1G);
> > +			size = min((phys_addr_t)SZ_1G,
> > (phys_addr_t)total_size);
> > +
> > +			/*
> > +			 * Ensure the size is power of two, this is requirement
> > to run
> > +			 * get_ram_size() / memory test
> > +			 */
> > +			if (size != 0 && ((size & (size - 1)) == 0)) {
> > +				ram_check += get_ram_size((void *)(start +
> > ram_check), size);
> > +				total_size = bd->bi_dram[bank].size -
> > ram_check;
> > +			} else {
> > +				puts("DDR: Memory test requires SDRAM
> > size in power of two!\n");
> > +				hang();
> > +			}
> >  		}
> > +
> >  		total_ram_check += ram_check;
> >  		ram_check = 0;
> >  	}
> > --
> > 2.13.0



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