[PATCH v2 13/16] x86: coreboot: Document the memory map

[Simon Glass]

Add information about memory usage when U-Boot is started from coreboot.
This is useful when debugging. Also, since coreboot takes a chunk of
memory in the middle of SDRAM for use by PCI devices, it can help avoid
overwriting this with a loaded kernel by accident.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

Changes in v2:
- Convert table to reST format

 doc/board/coreboot/coreboot.rst | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
index 9c44c025a48..3792f9e1c8d 100644
--- a/doc/board/coreboot/coreboot.rst
+++ b/doc/board/coreboot/coreboot.rst
@@ -50,3 +50,24 @@ works by using a 32-bit SPL binary to switch to 64-bit for running U-Boot. It
 can be useful for running UEFI applications, for example.
 
 This has only been lightly tested.
+
+
+Memory map
+----------
+
+  ==========  ==================================================================
+     Address  Region at that address
+  ==========  ==================================================================
+    ffffffff  Top of ROM (and last byte of 32-bit address space)
+    7a9fd000  Typical top of memory available to U-Boot
+              (use cbsysinfo to see where memory range 'table' starts)
+    10000000  Memory reserved by coreboot for mapping PCI devices
+              (typical size 2151000, includes framebuffer)
+     1920000  CONFIG_SYS_CAR_ADDR, fake Cache-as-RAM memory, used during startup
+     1110000  CONFIG_SYS_TEXT_BASE (start address of U-Boot code, before reloc)
+      110000  CONFIG_BLOBLIST_ADDR (before being relocated)
+      100000  CONFIG_PRE_CON_BUF_ADDR
+       f0000  ACPI tables set up by U-Boot
+              (typically redirects to 7ab10030 or similar)
+         500  Location of coreboot sysinfo table, used during startup
+  ==========  ==================================================================
-- 
2.31.1.498.g6c1eba8ee3d-goog