[PATCH 3/3] pci: pcie_dw_rockchip: Use udelay instead of msleep

[Patrick Wildt]

Am Mon, Apr 26, 2021 at 01:26:32PM +0000 schrieb Anand Moon:
> Use udelay instead of msleep fix the below warning.

You sure that's correct? the m in msleep means milli, while the u
in udelay means micro.  That's a factor of 1000 of a difference.

> drivers/pci/pcie_dw_rockchip.c:254:3: warning: implicit
> 	declaration of function 'msleep' [-Wimplicit-function-declaration]
> 
> Cc: Neil Armstrong <narmstrong at baylibre.com>
> Cc: Kever Yang <kever.yang at rock-chips.com>
> Signed-off-by: Anand Moon <linux.amoon at gmail.com>
> ---
>  drivers/pci/pcie_dw_rockchip.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
> index e7f42604ab..6c87ee1ea0 100644
> --- a/drivers/pci/pcie_dw_rockchip.c
> +++ b/drivers/pci/pcie_dw_rockchip.c
> @@ -249,7 +249,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
>  		 * some wired devices need much more, such as 600ms.
>  		 * Add a enough delay to cover all cases.
>  		 */
> -		msleep(PERST_WAIT_MS);
> +		udelay(PERST_WAIT_MS);
>  		dm_gpio_set_value(&priv->rst_gpio, 1);
>  	}
>  
> @@ -271,12 +271,12 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
>  		dev_info(priv->dw.dev, "PCIe Linking... LTSSM is 0x%x\n",
>  			 rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
>  		rk_pcie_debug_dump(priv);
> -		msleep(1000);
> +		udelay(1000);
>  	}
>  
>  	dev_err(priv->dw.dev, "PCIe-%d Link Fail\n", dev_seq(priv->dw.dev));
>  	/* Link maybe in Gen switch recovery but we need to wait more 1s */
> -	msleep(1000);
> +	udelay(1000);
>  	return -EIO;
>  }
>  
> @@ -296,7 +296,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
>  		}
>  	}
>  
> -	msleep(1000);
> +	udelay(1000);
>  
>  	ret = generic_phy_init(&priv->phy);
>  	if (ret) {
> -- 
> 2.31.1
>