[PATCH 09/30] clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()

[Marek Vasut]

From: Hai Pham <hai.pham.ud at renesas.com>

CPG IP in some specific Renesas SoCs (i.e. new R8A779A0 V3U SoC)
requires a different setting procedure. Make struct cpg_mssr_info
accessible to handle the clock setting in that case.

Signed-off-by: Hai Pham <hai.pham.ud at renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas at gmail.com>
---
 drivers/clk/renesas/clk-rcar-gen2.c    | 4 ++--
 drivers/clk/renesas/clk-rcar-gen3.c    | 4 ++--
 drivers/clk/renesas/renesas-cpg-mssr.c | 3 ++-
 drivers/clk/renesas/renesas-cpg-mssr.h | 3 ++-
 4 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c
index b0164a6486..d2d0169dd8 100644
--- a/drivers/clk/renesas/clk-rcar-gen2.c
+++ b/drivers/clk/renesas/clk-rcar-gen2.c
@@ -61,14 +61,14 @@ static int gen2_clk_enable(struct clk *clk)
 {
 	struct gen2_clk_priv *priv = dev_get_priv(clk->dev);
 
-	return renesas_clk_endisable(clk, priv->base, true);
+	return renesas_clk_endisable(clk, priv->base, priv->info, true);
 }
 
 static int gen2_clk_disable(struct clk *clk)
 {
 	struct gen2_clk_priv *priv = dev_get_priv(clk->dev);
 
-	return renesas_clk_endisable(clk, priv->base, false);
+	return renesas_clk_endisable(clk, priv->base, priv->info, false);
 }
 
 static ulong gen2_clk_get_rate(struct clk *clk)
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
index 938d98546b..27939d6318 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -143,14 +143,14 @@ static int gen3_clk_enable(struct clk *clk)
 {
 	struct gen3_clk_priv *priv = dev_get_priv(clk->dev);
 
-	return renesas_clk_endisable(clk, priv->base, true);
+	return renesas_clk_endisable(clk, priv->base, priv->info, true);
 }
 
 static int gen3_clk_disable(struct clk *clk)
 {
 	struct gen3_clk_priv *priv = dev_get_priv(clk->dev);
 
-	return renesas_clk_endisable(clk, priv->base, false);
+	return renesas_clk_endisable(clk, priv->base, priv->info, false);
 }
 
 static u64 gen3_clk_get_rate64(struct clk *clk)
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index bed2a16448..0cf80a9866 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -132,7 +132,8 @@ int renesas_clk_get_parent(struct clk *clk, struct cpg_mssr_info *info,
 	return 0;
 }
 
-int renesas_clk_endisable(struct clk *clk, void __iomem *base, bool enable)
+int renesas_clk_endisable(struct clk *clk, void __iomem *base,
+			  struct cpg_mssr_info *info, bool enable)
 {
 	const unsigned long clkid = clk->id & 0xffff;
 	const unsigned int reg = clkid / 100;
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index ad5d269fc4..8c8a09b904 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -115,7 +115,8 @@ int renesas_clk_get_core(struct clk *clk, struct cpg_mssr_info *info,
 			 const struct cpg_core_clk **core);
 int renesas_clk_get_parent(struct clk *clk, struct cpg_mssr_info *info,
 			   struct clk *parent);
-int renesas_clk_endisable(struct clk *clk, void __iomem *base, bool enable);
+int renesas_clk_endisable(struct clk *clk, void __iomem *base,
+			  struct cpg_mssr_info *info, bool enable);
 int renesas_clk_remove(void __iomem *base, struct cpg_mssr_info *info);
 
 #endif /* __DRIVERS_CLK_RENESAS_CPG_MSSR__ */
-- 
2.30.2