[PATCH 27/30] ARM: renesas: Add R8A779A0 V3U Falcon board code
Marek Vasut
marek.vasut at gmail.com
Wed Apr 28 21:29:49 CEST 2021
From: Hai Pham <hai.pham.ud at renesas.com>
Add board code for the R8A779A0 V3U Falcon board.
Signed-off-by: Hai Pham <hai.pham.ud at renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas at gmail.com>
--
Marek: - various small rebase fixes and clean ups
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/r8a779a0-falcon-u-boot.dts | 32 +++++++++++++
arch/arm/mach-rmobile/Kconfig.64 | 7 +++
board/renesas/falcon/Kconfig | 15 ++++++
board/renesas/falcon/MAINTAINERS | 6 +++
board/renesas/falcon/Makefile | 13 +++++
board/renesas/falcon/falcon.c | 47 ++++++++++++++++++
configs/r8a779a0_falcon_defconfig | 64 +++++++++++++++++++++++++
include/configs/falcon.h | 25 ++++++++++
9 files changed, 211 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/r8a779a0-falcon-u-boot.dts
create mode 100644 board/renesas/falcon/Kconfig
create mode 100644 board/renesas/falcon/MAINTAINERS
create mode 100644 board/renesas/falcon/Makefile
create mode 100644 board/renesas/falcon/falcon.c
create mode 100644 configs/r8a779a0_falcon_defconfig
create mode 100644 include/configs/falcon.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aec5020a0f..5b4ffc9ee6 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -879,7 +879,8 @@ dtb-$(CONFIG_RCAR_GEN3) += \
r8a77970-eagle-u-boot.dtb \
r8a77980-condor-u-boot.dtb \
r8a77990-ebisu-u-boot.dtb \
- r8a77995-draak-u-boot.dtb
+ r8a77995-draak-u-boot.dtb \
+ r8a779a0-falcon-u-boot.dtb
ifdef CONFIG_RCAR_GEN3
DTC_FLAGS += -R 4 -p 0x1000
diff --git a/arch/arm/dts/r8a779a0-falcon-u-boot.dts b/arch/arm/dts/r8a779a0-falcon-u-boot.dts
new file mode 100644
index 0000000000..06d3922a38
--- /dev/null
+++ b/arch/arm/dts/r8a779a0-falcon-u-boot.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Falcon board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a779a0-falcon.dts"
+#include "r8a779a0-u-boot.dtsi"
+
+/ {
+ aliases {
+ spi0 = &rpc;
+ };
+};
+
+&rpc {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <1>;
+ spi-max-frequency = <50000000>;
+ status = "okay";
+
+ spi-flash at 0 {
+ reg = <0>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ status = "okay";
+ };
+};
diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index e22012e3b8..8df90acb4e 100644
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -110,6 +110,12 @@ config TARGET_EBISU
help
Support for Renesas R-Car Gen3 Ebisu platform
+config TARGET_FALCON
+ bool "Falcon board"
+ imply R8A779A0
+ help
+ Support for Renesas R-Car Gen3 Falcon platform
+
config TARGET_HIHOPE_RZG2
bool "HiHope RZ/G2 board"
imply R8A774A1
@@ -160,6 +166,7 @@ source "board/renesas/condor/Kconfig"
source "board/renesas/draak/Kconfig"
source "board/renesas/eagle/Kconfig"
source "board/renesas/ebisu/Kconfig"
+source "board/renesas/falcon/Kconfig"
source "board/renesas/salvator-x/Kconfig"
source "board/renesas/ulcb/Kconfig"
source "board/beacon/beacon-rzg2m/Kconfig"
diff --git a/board/renesas/falcon/Kconfig b/board/renesas/falcon/Kconfig
new file mode 100644
index 0000000000..1fcefa7e3c
--- /dev/null
+++ b/board/renesas/falcon/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_FALCON
+
+config SYS_SOC
+ default "rmobile"
+
+config SYS_BOARD
+ default "falcon"
+
+config SYS_VENDOR
+ default "renesas"
+
+config SYS_CONFIG_NAME
+ default "falcon"
+
+endif
diff --git a/board/renesas/falcon/MAINTAINERS b/board/renesas/falcon/MAINTAINERS
new file mode 100644
index 0000000000..2cacc91494
--- /dev/null
+++ b/board/renesas/falcon/MAINTAINERS
@@ -0,0 +1,6 @@
+FALCON BOARD
+M: Marek Vasut <marek.vasut+renesas at gmail.com>
+S: Maintained
+F: board/renesas/falcon/
+F: include/configs/falcon.h
+F: configs/r8a779a0_falcon_defconfig
diff --git a/board/renesas/falcon/Makefile b/board/renesas/falcon/Makefile
new file mode 100644
index 0000000000..3b202c24fb
--- /dev/null
+++ b/board/renesas/falcon/Makefile
@@ -0,0 +1,13 @@
+#
+# board/renesas/falcon/Makefile
+#
+# Copyright (C) 2020 Renesas Electronics Corp.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+ifdef CONFIG_SPL_BUILD
+obj-y := ../rcar-common/gen3-spl.o
+else
+obj-y := falcon.o ../rcar-common/common.o
+endif
diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c
new file mode 100644
index 0000000000..3e591e4b42
--- /dev/null
+++ b/board/renesas/falcon/falcon.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * board/renesas/falcon/falcon.c
+ * This file is Falcon board support.
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include <common.h>
+#include <asm/arch/rmobile.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/processor.h>
+#include <linux/errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CPGWPR 0xE6150000
+#define CPGWPCR 0xE6150004
+
+int board_early_init_f(void)
+{
+ /* Unlock CPG access */
+ writel(0x5A5AFFFF, CPGWPR);
+ writel(0xA5A50000, CPGWPCR);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
+
+ return 0;
+}
+
+#define RST_BASE 0xE6160000 /* Domain0 */
+#define RST_SRESCR0 (RST_BASE + 0x18)
+#define RST_SPRES 0x5AA58000
+
+void reset_cpu(void)
+{
+ writel(RST_SPRES, RST_SRESCR0);
+}
diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig
new file mode 100644
index 0000000000..dad8b77acf
--- /dev/null
+++ b/configs/r8a779a0_falcon_defconfig
@@ -0,0 +1,64 @@
+CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_ARCH_RMOBILE=y
+CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_ENV_SIZE=0x40000
+CONFIG_ENV_OFFSET=0xC00000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_TEXT_BASE=0xe6338000
+CONFIG_RCAR_GEN3=y
+CONFIG_TARGET_FALCON=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_DEFAULT_DEVICE_TREE="r8a779a0-falcon-u-boot"
+CONFIG_FIT=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb"
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SPANSION=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DM_ETH=y
+CONFIG_RENESAS_RAVB=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/include/configs/falcon.h b/include/configs/falcon.h
new file mode 100644
index 0000000000..b9c82a7674
--- /dev/null
+++ b/include/configs/falcon.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * include/configs/falcon.h
+ * This file is Falcon board configuration.
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#ifndef __FALCON_H
+#define __FALCON_H
+
+#include "rcar-gen3-common.h"
+
+/* Ethernet RAVB */
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI
+
+/* Board Clock */
+/* XTAL_CLK : 16.66MHz */
+#define CONFIG_SYS_CLK_FREQ 16666666u
+
+/* Generic Timer Definitions (use in assembler source) */
+#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
+
+#endif /* __FALCON_H */
--
2.30.2
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