[PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register
Stefan Roese
sr at denx.de
Mon Aug 2 08:33:37 CEST 2021
On 31.07.21 14:22, Pali Rohár wrote:
> Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz.
> Use this information instead of manual configuration in every board file.
>
> Signed-off-by: Pali Rohár <pali at kernel.org>
Reviewed-by: Stefan Roese <sr at denx.de>
Thanks,
Stefan
> ---
> arch/arm/mach-mvebu/include/mach/soc.h | 13 ++++++++-----
> include/configs/clearfog.h | 1 -
> include/configs/controlcenterdc.h | 2 --
> include/configs/db-88f6820-amc.h | 2 --
> include/configs/db-88f6820-gp.h | 2 --
> include/configs/helios4.h | 1 -
> include/configs/turris_omnia.h | 1 -
> include/configs/x530.h | 2 --
> 8 files changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
> index 3f3b15aa8ab6..cb323aa59a76 100644
> --- a/arch/arm/mach-mvebu/include/mach/soc.h
> +++ b/arch/arm/mach-mvebu/include/mach/soc.h
> @@ -33,11 +33,6 @@
> #define MV_88F68XX_A0_ID 0x4
> #define MV_88F68XX_B0_ID 0xa
>
> -/* TCLK Core Clock definition */
> -#ifndef CONFIG_SYS_TCLK
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> -#endif
> -
> /* SOC specific definations */
> #define INTREG_BASE 0xd0000000
> #define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080)
> @@ -170,6 +165,9 @@
> #define BOOT_FROM_SPI 0x32
> #define BOOT_FROM_MMC 0x30
> #define BOOT_FROM_MMC_ALT 0x31
> +
> +#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(15)) ? \
> + 200000000 : 250000000)
> #elif defined(CONFIG_ARMADA_MSYS)
> /* SAR values for MSYS */
> #define CONFIG_SAR_REG (MBUS_DFX_BASE + 0xf8200)
> @@ -207,4 +205,9 @@
> #define BOOT_FROM_SPI 0x3
> #endif
>
> +/* TCLK Core Clock definition */
> +#ifndef CONFIG_SYS_TCLK
> +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> +#endif
> +
> #endif /* _MVEBU_SOC_H */
> diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
> index fbdd2f0a244c..705217067b30 100644
> --- a/include/configs/clearfog.h
> +++ b/include/configs/clearfog.h
> @@ -17,7 +17,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
> diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
> index e81d05aa2e83..d9802d2a3b8d 100644
> --- a/include/configs/controlcenterdc.h
> +++ b/include/configs/controlcenterdc.h
> @@ -20,8 +20,6 @@
> * U-Boot into it.
> */
>
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> -
> #define CONFIG_LOADADDR 1000000
>
> /*
> diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h
> index 757fbc0b9bcd..83f5b71839e2 100644
> --- a/include/configs/db-88f6820-amc.h
> +++ b/include/configs/db-88f6820-amc.h
> @@ -10,8 +10,6 @@
> * High Level Configuration Options (easy to change)
> */
>
> -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
> -
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
>
> diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
> index d50eb2c12011..feab46cbcbc5 100644
> --- a/include/configs/db-88f6820-gp.h
> +++ b/include/configs/db-88f6820-gp.h
> @@ -10,8 +10,6 @@
> * High Level Configuration Options (easy to change)
> */
>
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> -
> /* I2C */
> #define CONFIG_SYS_I2C
> #define CONFIG_SYS_I2C_MVTWSI
> diff --git a/include/configs/helios4.h b/include/configs/helios4.h
> index 1368080f036b..b5814ed55cf2 100644
> --- a/include/configs/helios4.h
> +++ b/include/configs/helios4.h
> @@ -17,7 +17,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
> diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
> index 0a824b79397c..18b9861160b0 100644
> --- a/include/configs/turris_omnia.h
> +++ b/include/configs/turris_omnia.h
> @@ -16,7 +16,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
> diff --git a/include/configs/x530.h b/include/configs/x530.h
> index 515c6e7ff45c..64d68276234c 100644
> --- a/include/configs/x530.h
> +++ b/include/configs/x530.h
> @@ -12,8 +12,6 @@
>
> #define CONFIG_DISPLAY_BOARDINFO_LATE
>
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> -
> /*
> * NS16550 Configuration
> */
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de
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