[PATCH] clk: stm32mp1: add support of BSEC clock

[Patrice CHOTARD]

Hi Patrick

On 7/16/21 10:10 AM, Patrick Delaunay wrote:
> Add the support of the BSEC clock used by the STM32MP misc driver
> since the commit 622c956cada0 ("stm32mp: bsec: manage clock when present
> in device tree") even if this clock is not yet defined in kernel device
> tree stm32mp151.dtsi.
> 
> This patch avoids issue for basic boot when this secure clock are not
> provided by secure world with SCMI.
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay at foss.st.com>
> ---
> 
>  drivers/clk/clk_stm32mp1.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
> index 48c9514ba0..96e175f221 100644
> --- a/drivers/clk/clk_stm32mp1.c
> +++ b/drivers/clk/clk_stm32mp1.c
> @@ -552,6 +552,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = {
>  	STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL),
>  	STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 3, I2C6_K, _I2C46_SEL),
>  	STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 8, RTCAPB, _PCLK5),
> +	STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 16, BSEC, _UNKNOWN_SEL),
>  	STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 20, STGEN_K, _STGEN_SEL),
>  
>  	STM32MP1_CLK_SET_CLR_F(RCC_MP_AHB2ENSETR, 5, ADC12, _HCLK2),
> 

Reviewed-by: Patrice Chotard <patrice.chotard at foss.st.com>

Thanks
Patrice