[PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE

[Marek Behún]

+ pali, who can tell whether this won't break how the code is aligned
  with upstream mv-ddr

On Sat, 21 Aug 2021 13:50:14 -0400
Tom Rini <trini at konsulko.com> wrote:

> We have a number of CONFIG symbols to express the fixed size of system
> memory.  For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
> and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
> size rather than MiB.
> 
> Cc: Marek Behún <marek.behun at nic.cz>
> Cc: Stefan Roese <sr at denx.de>
> Signed-off-by: Tom Rini <trini at konsulko.com>
> ---
>  drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
>  include/configs/maxbcm.h           | 4 +++-
>  include/configs/theadorable.h      | 4 +++-
>  3 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
> index 270691e9bcd3..970651f87029 100644
> --- a/drivers/ddr/marvell/axp/ddr3_axp.h
> +++ b/drivers/ddr/marvell/axp/ddr3_axp.h
> @@ -19,10 +19,10 @@
>  #define FAR_END_DIMM_ADDR		0x50
>  #define MAX_DIMM_ADDR			0x60
>  
> -#ifndef CONFIG_DDR_FIXED_SIZE
> +#ifndef CONFIG_SYS_SDRAM_SIZE
>  #define SDRAM_CS_SIZE			0xFFFFFFF
>  #else
> -#define SDRAM_CS_SIZE			(CONFIG_DDR_FIXED_SIZE - 1)
> +#define SDRAM_CS_SIZE			((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
>  #endif
>  #define SDRAM_CS_BASE			0x0
>  #define SDRAM_DIMM_SIZE			0x80000000
> diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
> index fc2393204bec..5098f12f5425 100644
> --- a/include/configs/maxbcm.h
> +++ b/include/configs/maxbcm.h
> @@ -6,6 +6,8 @@
>  #ifndef _CONFIG_DB_MV7846MP_GP_H
>  #define _CONFIG_DB_MV7846MP_GP_H
>  
> +#include <linux/sizes.h>
> +
>  /*
>   * High Level Configuration Options (easy to change)
>   */
> @@ -65,7 +67,7 @@
>  /* SPL related SPI defines */
>  
>  /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> -#define CONFIG_DDR_FIXED_SIZE		(1 << 20)	/* 1GiB */
> +#define CONFIG_SYS_SDRAM_SIZE		SZ_1G
>  #define CONFIG_BOARD_ECC_SUPPORT	/* this board supports ECC */
>  
>  #endif /* _CONFIG_DB_MV7846MP_GP_H */
> diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
> index 760713d3ef87..abc48ff44ca5 100644
> --- a/include/configs/theadorable.h
> +++ b/include/configs/theadorable.h
> @@ -6,6 +6,8 @@
>  #ifndef _CONFIG_THEADORABLE_H
>  #define _CONFIG_THEADORABLE_H
>  
> +#include <linux/sizes.h>
> +
>  /*
>   * High Level Configuration Options (easy to change)
>   */
> @@ -93,6 +95,6 @@
>  #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
>  
>  /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> -#define CONFIG_DDR_FIXED_SIZE		(2 << 20)	/* 2GiB */
> +#define CONFIG_SYS_SDRAM_SIZE		SZ_2G
>  
>  #endif /* _CONFIG_THEADORABLE_H */