[PATCH V2] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
Marek Vasut
marex at denx.de
Mon Aug 23 15:50:34 CEST 2021
On 8/23/21 2:23 PM, Adam Ford wrote:
> On Thu, Jun 3, 2021 at 8:22 AM Adam Ford <aford173 at gmail.com> wrote:
>>
>> There is a QSPI NOR flash part on the board. Because this chip isn't
>> yet supported in Linux, but it is supported in U-Boot, and the
>> face that the RPC_SPI compatible names are different in U-Boot and
>> Linux, the device tree updates are confined to -u-boot.dtsi files.
>>
>> In order to use the QSPI, TF-A must leave RPC unlocked by compiling
>> TF-A with RZG_RPC_HYPERFLASH_LOCKED=0.
>>
>> Signed-off-by: Adam Ford <aford173 at gmail.com>
>> Reviewed-by: Biju Bas <biju.das.jz at bp.renesas.com>
>
> Marek,
>
> It looks like this [1] was assigned to you. its been a couple months.
> any chance this could get applied or get feedback?
Rebase, fix the below, resend, I'll pick it.
Also, probably don't wait "a few months" and let the frustration grow
next time, week or two usually means the patch was missed.
>> / {
>> + aliases {
>> + spi0 = &rpc;
>> + };
>> +
>> soc {
>> u-boot,dm-pre-reloc;
>> };
>> };
>>
>> +&avb {
>> + phy-mode = "rgmii-txid";
>> +};
>> +
Do you really need ethernet for QSPI NOR ?
>> &cpg {
>> u-boot,dm-pre-reloc;
>> };
>> @@ -25,6 +33,25 @@
>> u-boot,dm-pre-reloc;
>> };
>>
>> +&rpc {
>> + compatible = "renesas,rcar-gen3-rpc";
>> + num-cs = <1>;
>> + spi-max-frequency = <40000000>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "okay";
btw. can those duplicate entries be somehow deduplicated into some
yourboard.dtsi file ?
>> + flash0: spi-flash at 0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + reg = <0>;
>> + compatible = "spi-flash", "jedec,spi-nor";
>> + spi-max-frequency = <40000000>;
>> + spi-tx-bus-width = <1>;
>> + spi-rx-bus-width = <1>;
>> + };
>> +};
[...]
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