[PATCH V3] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash

[Adam Ford]

There is a QSPI NOR flash part on the board.  Because this chip isn't
yet supported in Linux, but it is supported in U-Boot, and the
face that the RPC_SPI compatible names are different in U-Boot and
Linux, the device tree updates are confined to -u-boot.dtsi files.

In order to use the QSPI, TF-A must leave RPC unlocked by compiling
TF-A with RZG_RPC_HYPERFLASH_LOCKED=0.

Signed-off-by: Adam Ford <aford173 at gmail.com>
Reviewed-by: Biju Bas <biju.das.jz at bp.renesas.com>
---
V3:  Rebase, and combine into som.dsti file
V2:  Add note to commit message about TF-A
     No functional changes

diff --git a/arch/arm/dts/beacon-renesom-som.dtsi b/arch/arm/dts/beacon-renesom-som.dtsi
index 9565495b49..d30bab3c8b 100644
--- a/arch/arm/dts/beacon-renesom-som.dtsi
+++ b/arch/arm/dts/beacon-renesom-som.dtsi
@@ -7,6 +7,10 @@
 #include <dt-bindings/clk/versaclock.h>
 
 / {
+	aliases {
+		spi0 = &rpc;
+	};
+
 	memory at 48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -275,6 +279,25 @@
 	};
 };
 
+&rpc {
+	compatible = "renesas,rcar-gen3-rpc";
+	num-cs = <1>;
+	spi-max-frequency = <40000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	flash0: spi-flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+		compatible = "spi-flash", "jedec,spi-nor";
+		spi-max-frequency = <40000000>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+	};
+};
+
 &scif_clk {
 	clock-frequency = <14745600>;
 };
diff --git a/configs/r8a774a1_beacon_defconfig b/configs/r8a774a1_beacon_defconfig
index 23c423060d..7ba4ac05f5 100644
--- a/configs/r8a774a1_beacon_defconfig
+++ b/configs/r8a774a1_beacon_defconfig
@@ -18,7 +18,9 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
 CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
@@ -47,6 +49,10 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_BITBANGMII=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH=y
@@ -56,6 +62,9 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_SPECIFY_CONSOLE_INDEX=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/r8a774b1_beacon_defconfig b/configs/r8a774b1_beacon_defconfig
index 034ed219e2..44528cd2e1 100644
--- a/configs/r8a774b1_beacon_defconfig
+++ b/configs/r8a774b1_beacon_defconfig
@@ -18,7 +18,9 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
 CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
@@ -48,6 +50,10 @@ CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
 CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_BITBANGMII=y
 CONFIG_PHY_REALTEK=y
@@ -61,6 +67,9 @@ CONFIG_SCIF_CONSOLE=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_RENESAS_RPC_SPI=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/r8a774e1_beacon_defconfig b/configs/r8a774e1_beacon_defconfig
index a6e1ea0e16..9cde39f467 100644
--- a/configs/r8a774e1_beacon_defconfig
+++ b/configs/r8a774e1_beacon_defconfig
@@ -18,7 +18,9 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
 CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
@@ -47,6 +49,10 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_BITBANGMII=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH=y
@@ -56,6 +62,9 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_SPECIFY_CONSOLE_INDEX=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
-- 
2.25.1