[PATCH 2/9] arm: dts: ls1028a: move devices into /soc

Michael Walle michael at walle.cc
Tue Aug 31 17:40:21 CEST 2021


Move all the CCSR related device nodes into /soc similiar to the linux
device tree.

Signed-off-by: Michael Walle <michael at walle.cc>
---
 .../dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi  |   4 +
 .../dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi   |   2 +-
 .../dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi   |   2 +-
 .../dts/fsl-ls1028a-qds-7777-sch-30841.dtsi   |   8 +-
 .../dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi  |   4 +-
 .../dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi   |   2 +-
 .../fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi  |   8 +-
 .../dts/fsl-ls1028a-qds-9999-sch-24801.dtsi   |   8 +-
 .../fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi  |   8 +-
 .../fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi  |   8 +-
 .../dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi   |   2 +-
 .../dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi   |   2 +-
 arch/arm/dts/fsl-ls1028a-qds.dtsi             |   4 +
 arch/arm/dts/fsl-ls1028a-rdb.dts              |   4 +
 arch/arm/dts/fsl-ls1028a.dtsi                 | 767 +++++++++---------
 15 files changed, 426 insertions(+), 407 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
index b3861ed98c..fa4c05212a 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
@@ -266,6 +266,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&soc {
+	u-boot,dm-pre-reloc;
+};
+
 &sysclk {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
index 23816da8ee..181fd2ddcb 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
@@ -16,5 +16,5 @@
 &enetc0 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 02}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 02}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
index c6558ae2e0..67b68f1b3d 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
@@ -15,5 +15,5 @@
 &enetc0 {
 	status = "okay";
 	phy-mode = "sgmii-2500";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 02}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 02}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
index 5a0f060c16..433731df0e 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
@@ -31,25 +31,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "sgmii-2500";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 00}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 00}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "sgmii-2500";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 01}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 01}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "sgmii-2500";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 02}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "sgmii-2500";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 03}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 03}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
index 39a83e10c4..cb74c8b371 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
@@ -20,13 +20,13 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "sgmii-2500";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 02}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "sgmii-2500";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 03}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 03}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi b/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
index 7d4702e4ff..979c0ddd48 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
@@ -15,5 +15,5 @@
 &enetc0 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1c}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1c}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
index 021fe3fbc6..f74c1433af 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
@@ -45,25 +45,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1c}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1c}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 1c}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 1c}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1e}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1e}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1f}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1f}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
index b6704d8089..4edc428b27 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
@@ -30,25 +30,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1c}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1c}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1d}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1d}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1e}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1e}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1f}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 40/phy at 1f}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
index 8c10897e56..7fefb4c99f 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
@@ -30,25 +30,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 00}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 00}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 01}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 01}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 02}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 03}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 03}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
index 1d800dacef..223145756a 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
@@ -24,25 +24,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 08}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 08}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 09}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 09}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 0a}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 0a}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 0b}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 0b}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
index 1fb2cdf0c2..1834418ae2 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
@@ -20,7 +20,7 @@
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "sgmii-2500";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 02}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 50/phy at 02}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
index 2333f74e5a..2ee11bcacb 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
@@ -20,7 +20,7 @@
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "sgmii-2500";
-	phy-handle = <&{/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 60/phy at 02}>;
+	phy-handle = <&{/soc/i2c at 2000000/fpga at 66/mux-mdio at 54/mdio at 60/phy at 02}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds.dtsi b/arch/arm/dts/fsl-ls1028a-qds.dtsi
index 69632fa796..3b223a5b52 100644
--- a/arch/arm/dts/fsl-ls1028a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds.dtsi
@@ -241,6 +241,10 @@
 	status = "okay";
 };
 
+&soc {
+	u-boot,dm-pre-reloc;
+};
+
 &usb1 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index 82a8c0a0cd..06ee4e747a 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -123,6 +123,10 @@
 	status = "okay";
 };
 
+&soc {
+	u-boot,dm-pre-reloc;
+};
+
 &usb1 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 53b052ed32..b3b497218f 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -21,13 +21,6 @@
 		clock-output-names = "sysclk";
 	};
 
-	clockgen: clocking at 1300000 {
-		compatible = "fsl,ls1028a-clockgen";
-		reg = <0x0 0x1300000 0x0 0xa0000>;
-		#clock-cells = <2>;
-		clocks = <&sysclk>;
-	};
-
 	memory at 01080000 {
 		device_type = "memory";
 		reg = <0x00000000 0x01080000 0 0x80000000>;
@@ -56,432 +49,446 @@
 					  IRQ_TYPE_LEVEL_LOW)>;
 	};
 
-	fspi: flexspi at 20c0000 {
-		compatible = "nxp,lx2160a-fspi";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x20c0000 0x0 0x10000>,
-		      <0x0 0x20000000 0x0 0x10000000>;
-		reg-names = "fspi_base", "fspi_mmap";
-		clocks = <&clockgen 4 3>, <&clockgen 4 3>;
-		clock-names = "fspi_en", "fspi";
-		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
-
-	serial0: serial at 21c0500 {
-		device_type = "serial";
-		compatible = "fsl,ns16550", "ns16550a";
-		reg = <0x0 0x21c0500 0x0 0x100>;
-		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
-
-	serial1: serial at 21c0600 {
-		device_type = "serial";
-		compatible = "fsl,ns16550", "ns16550a";
-		reg = <0x0 0x21c0600 0x0 0x100>;
-		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
-
-	pcie1: pcie at 3400000 {
-	       compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
-	       reg = <0x00 0x03400000 0x0 0x80000
-		       0x00 0x03480000 0x0 0x40000   /* lut registers */
-		       0x00 0x034c0000 0x0 0x40000  /* pf controls registers */
-		       0x80 0x00000000 0x0 0x20000>; /* configuration space */
-	       reg-names = "dbi", "lut", "ctrl", "config";
-	       #address-cells = <3>;
-	       #size-cells = <2>;
-	       device_type = "pci";
-	       num-lanes = <4>;
-	       bus-range = <0x0 0xff>;
-	       ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000   /* downstream I/O */
-		       0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-	};
+	soc: soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
 
-	pcie2: pcie at 3500000 {
-	       compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
-	       reg = <0x00 0x03500000 0x0 0x80000
-		       0x00 0x03580000 0x0 0x40000   /* lut registers */
-		       0x00 0x035c0000 0x0 0x40000  /* pf controls registers */
-		       0x88 0x00000000 0x0 0x20000>; /* configuration space */
-	       reg-names = "dbi", "lut", "ctrl", "config";
-	       #address-cells = <3>;
-	       #size-cells = <2>;
-	       device_type = "pci";
-	       num-lanes = <4>;
-	       bus-range = <0x0 0xff>;
-	       ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000   /* downstream I/O */
-		       0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-	};
+		clockgen: clocking at 1300000 {
+			compatible = "fsl,ls1028a-clockgen";
+			reg = <0x0 0x1300000 0x0 0xa0000>;
+			#clock-cells = <2>;
+			clocks = <&sysclk>;
+		};
 
-	pcie at 1f0000000 {
-		compatible = "pci-host-ecam-generic";
-		/* ECAM bus 0, HW has more space reserved but not populated */
-		bus-range = <0x0 0x0>;
-		reg = <0x01 0xf0000000 0x0 0x100000>;
-		#address-cells = <3>;
-		#size-cells = <2>;
-		device_type = "pci";
-		ranges= <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000>;
-		enetc0: pci at 0,0 {
-			reg = <0x000000 0 0 0 0>;
+		fspi: flexspi at 20c0000 {
+			compatible = "nxp,lx2160a-fspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x20c0000 0x0 0x10000>,
+				  <0x0 0x20000000 0x0 0x10000000>;
+			reg-names = "fspi_base", "fspi_mmap";
+			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+			clock-names = "fspi_en", "fspi";
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
 		};
-		enetc1: pci at 0,1 {
-			reg = <0x000100 0 0 0 0>;
+
+		serial0: serial at 21c0500 {
+			device_type = "serial";
+			compatible = "fsl,ns16550", "ns16550a";
+			reg = <0x0 0x21c0500 0x0 0x100>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
 		};
-		enetc2: pci at 0,2 {
-			reg = <0x000200 0 0 0 0>;
-			status = "disabled";
-			phy-mode = "internal";
 
-			fixed-link {
-				speed = <2500>;
-				full-duplex;
-			};
-		};
-		mdio0: pci at 0,3 {
-			#address-cells=<0>;
-			#size-cells=<1>;
-			reg = <0x000300 0 0 0 0>;
+		serial1: serial at 21c0600 {
+			device_type = "serial";
+			compatible = "fsl,ns16550", "ns16550a";
+			reg = <0x0 0x21c0600 0x0 0x100>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
-
-			fixed-link {
-				speed = <1000>;
-				full-duplex;
-			};
 		};
 
-		mscc_felix: pci at 0,5 {
-			reg = <0x000500 0 0 0 0>;
-			status = "disabled";
+		pcie1: pcie at 3400000 {
+			   compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
+			   reg = <0x00 0x03400000 0x0 0x80000
+				   0x00 0x03480000 0x0 0x40000   /* lut registers */
+				   0x00 0x034c0000 0x0 0x40000  /* pf controls registers */
+				   0x80 0x00000000 0x0 0x20000>; /* configuration space */
+			   reg-names = "dbi", "lut", "ctrl", "config";
+			   #address-cells = <3>;
+			   #size-cells = <2>;
+			   device_type = "pci";
+			   num-lanes = <4>;
+			   bus-range = <0x0 0xff>;
+			   ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000   /* downstream I/O */
+				   0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+		};
 
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
+		pcie2: pcie at 3500000 {
+			   compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
+			   reg = <0x00 0x03500000 0x0 0x80000
+				   0x00 0x03580000 0x0 0x40000   /* lut registers */
+				   0x00 0x035c0000 0x0 0x40000  /* pf controls registers */
+				   0x88 0x00000000 0x0 0x20000>; /* configuration space */
+			   reg-names = "dbi", "lut", "ctrl", "config";
+			   #address-cells = <3>;
+			   #size-cells = <2>;
+			   device_type = "pci";
+			   num-lanes = <4>;
+			   bus-range = <0x0 0xff>;
+			   ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000   /* downstream I/O */
+				   0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+		};
 
-				mscc_felix_port0: port at 0 {
-					reg = <0>;
-					status = "disabled";
+		pcie at 1f0000000 {
+			compatible = "pci-host-ecam-generic";
+			/* ECAM bus 0, HW has more space reserved but not populated */
+			bus-range = <0x0 0x0>;
+			reg = <0x01 0xf0000000 0x0 0x100000>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			device_type = "pci";
+			ranges= <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000>;
+			enetc0: pci at 0,0 {
+				reg = <0x000000 0 0 0 0>;
+				status = "disabled";
+			};
+			enetc1: pci at 0,1 {
+				reg = <0x000100 0 0 0 0>;
+				status = "disabled";
+			};
+			enetc2: pci at 0,2 {
+				reg = <0x000200 0 0 0 0>;
+				status = "disabled";
+				phy-mode = "internal";
+
+				fixed-link {
+					speed = <2500>;
+					full-duplex;
 				};
-
-				mscc_felix_port1: port at 1 {
-					reg = <1>;
-					status = "disabled";
+			};
+			mdio0: pci at 0,3 {
+				#address-cells=<0>;
+				#size-cells=<1>;
+				reg = <0x000300 0 0 0 0>;
+				status = "disabled";
+
+				fixed-link {
+					speed = <1000>;
+					full-duplex;
 				};
+			};
 
-				mscc_felix_port2: port at 2 {
-					reg = <2>;
-					status = "disabled";
-				};
+			mscc_felix: pci at 0,5 {
+				reg = <0x000500 0 0 0 0>;
+				status = "disabled";
 
-				mscc_felix_port3: port at 3 {
-					reg = <3>;
-					status = "disabled";
-				};
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
 
-				mscc_felix_port4: port at 4 {
-					reg = <4>;
-					phy-mode = "internal";
-					status = "disabled";
+					mscc_felix_port0: port at 0 {
+						reg = <0>;
+						status = "disabled";
+					};
 
-					fixed-link {
-						speed = <2500>;
-						full-duplex;
+					mscc_felix_port1: port at 1 {
+						reg = <1>;
+						status = "disabled";
+					};
+
+					mscc_felix_port2: port at 2 {
+						reg = <2>;
+						status = "disabled";
 					};
-				};
 
-				mscc_felix_port5: port at 5 {
-					reg = <5>;
-					phy-mode = "internal";
-					status = "disabled";
+					mscc_felix_port3: port at 3 {
+						reg = <3>;
+						status = "disabled";
+					};
+
+					mscc_felix_port4: port at 4 {
+						reg = <4>;
+						phy-mode = "internal";
+						status = "disabled";
 
-					fixed-link {
-						speed = <1000>;
-						full-duplex;
+						fixed-link {
+							speed = <2500>;
+							full-duplex;
+						};
 					};
 
+					mscc_felix_port5: port at 5 {
+						reg = <5>;
+						phy-mode = "internal";
+						status = "disabled";
+
+						fixed-link {
+							speed = <1000>;
+							full-duplex;
+						};
+
+					};
 				};
 			};
+
+			enetc6: pci at 0,6 {
+				reg = <0x000600 0 0 0 0>;
+				status = "disabled";
+				phy-mode = "internal";
+			};
 		};
 
-		enetc6: pci at 0,6 {
-			reg = <0x000600 0 0 0 0>;
+		i2c0: i2c at 2000000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2000000 0x0 0x10000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
 			status = "disabled";
-			phy-mode = "internal";
 		};
-	};
 
-	i2c0: i2c at 2000000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2000000 0x0 0x10000>;
-		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c1: i2c at 2010000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2010000 0x0 0x10000>;
-		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
+		i2c1: i2c at 2010000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2010000 0x0 0x10000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
 
-	i2c2: i2c at 2020000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2020000 0x0 0x10000>;
-		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
+		i2c2: i2c at 2020000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2020000 0x0 0x10000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
 
-	i2c3: i2c at 2030000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2030000 0x0 0x10000>;
-		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
+		i2c3: i2c at 2030000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2030000 0x0 0x10000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
 
-	i2c4: i2c at 2040000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2040000 0x0 0x10000>;
-		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
+		i2c4: i2c at 2040000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2040000 0x0 0x10000>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
 
-	i2c5: i2c at 2050000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2050000 0x0 0x10000>;
-		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
+		i2c5: i2c at 2050000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2050000 0x0 0x10000>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
 
-	i2c6: i2c at 2060000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2060000 0x0 0x10000>;
-		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
+		i2c6: i2c at 2060000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2060000 0x0 0x10000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
 
-	i2c7: i2c at 2070000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2070000 0x0 0x10000>;
-		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
+		i2c7: i2c at 2070000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2070000 0x0 0x10000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
 
-	lpuart0: serial at 2260000 {
-		compatible = "fsl,ls1021a-lpuart";
-		reg = <0x0 0x2260000 0x0 0x1000>;
-		interrupts = <0 232 0x4>;
-		clocks = <&sysclk>;
-		clock-names = "ipg";
-		little-endian;
-		status = "disabled";
-	};
+		lpuart0: serial at 2260000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x2260000 0x0 0x1000>;
+			interrupts = <0 232 0x4>;
+			clocks = <&sysclk>;
+			clock-names = "ipg";
+			little-endian;
+			status = "disabled";
+		};
 
-	lpuart1: serial at 2270000 {
-		compatible = "fsl,ls1021a-lpuart";
-		reg = <0x0 0x2270000 0x0 0x1000>;
-		interrupts = <0 233 0x4>;
-		clocks = <&sysclk>;
-		clock-names = "ipg";
-		little-endian;
-		status = "disabled";
-	};
+		lpuart1: serial at 2270000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x2270000 0x0 0x1000>;
+			interrupts = <0 233 0x4>;
+			clocks = <&sysclk>;
+			clock-names = "ipg";
+			little-endian;
+			status = "disabled";
+		};
 
-	lpuart2: serial at 2280000 {
-		compatible = "fsl,ls1021a-lpuart";
-		reg = <0x0 0x2280000 0x0 0x1000>;
-		interrupts = <0 234 0x4>;
-		clocks = <&sysclk>;
-		clock-names = "ipg";
-		little-endian;
-		status = "disabled";
-	};
+		lpuart2: serial at 2280000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x2280000 0x0 0x1000>;
+			interrupts = <0 234 0x4>;
+			clocks = <&sysclk>;
+			clock-names = "ipg";
+			little-endian;
+			status = "disabled";
+		};
 
-	lpuart3: serial at 2290000 {
-		compatible = "fsl,ls1021a-lpuart";
-		reg = <0x0 0x2290000 0x0 0x1000>;
-		interrupts = <0 235 0x4>;
-		clocks = <&sysclk>;
-		clock-names = "ipg";
-		little-endian;
-		status = "disabled";
-	};
+		lpuart3: serial at 2290000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x2290000 0x0 0x1000>;
+			interrupts = <0 235 0x4>;
+			clocks = <&sysclk>;
+			clock-names = "ipg";
+			little-endian;
+			status = "disabled";
+		};
 
-	lpuart4: serial at 22a0000 {
-		compatible = "fsl,ls1021a-lpuart";
-		reg = <0x0 0x22a0000 0x0 0x1000>;
-		interrupts = <0 236 0x4>;
-		clocks = <&sysclk>;
-		clock-names = "ipg";
-		little-endian;
-		status = "disabled";
-	};
+		lpuart4: serial at 22a0000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x22a0000 0x0 0x1000>;
+			interrupts = <0 236 0x4>;
+			clocks = <&sysclk>;
+			clock-names = "ipg";
+			little-endian;
+			status = "disabled";
+		};
 
-	lpuart5: serial at 22b0000 {
-		compatible = "fsl,ls1021a-lpuart";
-		reg = <0x0 0x22b0000 0x0 0x1000>;
-		interrupts = <0 237 0x4>;
-		clocks = <&sysclk>;
-		clock-names = "ipg";
-		little-endian;
-		status = "disabled";
-	};
+		lpuart5: serial at 22b0000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x22b0000 0x0 0x1000>;
+			interrupts = <0 237 0x4>;
+			clocks = <&sysclk>;
+			clock-names = "ipg";
+			little-endian;
+			status = "disabled";
+		};
 
-	usb1: usb3 at 3100000 {
-		compatible = "fsl,layerscape-dwc3";
-		reg = <0x0 0x3100000 0x0 0x10000>;
-		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
-		dr_mode = "host";
-		status = "disabled";
-	};
+		usb1: usb3 at 3100000 {
+			compatible = "fsl,layerscape-dwc3";
+			reg = <0x0 0x3100000 0x0 0x10000>;
+			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+			dr_mode = "host";
+			status = "disabled";
+		};
 
-	usb2: usb3 at 3110000 {
-		compatible = "fsl,layerscape-dwc3";
-		reg = <0x0 0x3110000 0x0 0x10000>;
-		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
-		dr_mode = "host";
-		status = "disabled";
-	};
+		usb2: usb3 at 3110000 {
+			compatible = "fsl,layerscape-dwc3";
+			reg = <0x0 0x3110000 0x0 0x10000>;
+			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+			dr_mode = "host";
+			status = "disabled";
+		};
 
-	dspi0: dspi at 2100000 {
-		compatible = "fsl,vf610-dspi";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2100000 0x0 0x10000>;
-		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "dspi";
-		clocks = <&clockgen 4 0>;
-		num-cs = <5>;
-		litte-endian;
-		status = "disabled";
-	};
+		dspi0: dspi at 2100000 {
+			compatible = "fsl,vf610-dspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2100000 0x0 0x10000>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "dspi";
+			clocks = <&clockgen 4 0>;
+			num-cs = <5>;
+			litte-endian;
+			status = "disabled";
+		};
 
-	dspi1: dspi at 2110000 {
-		compatible = "fsl,vf610-dspi";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2110000 0x0 0x10000>;
-		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "dspi";
-		clocks = <&clockgen 4 0>;
-		num-cs = <5>;
-		little-endian;
-		status = "disabled";
-	};
+		dspi1: dspi at 2110000 {
+			compatible = "fsl,vf610-dspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2110000 0x0 0x10000>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "dspi";
+			clocks = <&clockgen 4 0>;
+			num-cs = <5>;
+			little-endian;
+			status = "disabled";
+		};
 
-	dspi2: dspi at 2120000 {
-		compatible = "fsl,vf610-dspi";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2120000 0x0 0x10000>;
-		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "dspi";
-		clocks = <&clockgen 4 0>;
-		num-cs = <5>;
-		little-endian;
-		status = "disabled";
-	};
+		dspi2: dspi at 2120000 {
+			compatible = "fsl,vf610-dspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2120000 0x0 0x10000>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "dspi";
+			clocks = <&clockgen 4 0>;
+			num-cs = <5>;
+			little-endian;
+			status = "disabled";
+		};
 
-	esdhc0: esdhc at 2140000 {
-		compatible = "fsl,esdhc";
-		reg = <0x0 0x2140000 0x0 0x10000>;
-		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-		big-endian;
-		bus-width = <4>;
-		status = "disabled";
-	};
+		esdhc0: esdhc at 2140000 {
+			compatible = "fsl,esdhc";
+			reg = <0x0 0x2140000 0x0 0x10000>;
+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			big-endian;
+			bus-width = <4>;
+			status = "disabled";
+		};
 
-	esdhc1: esdhc at 2150000 {
-		compatible = "fsl,esdhc";
-		reg = <0x0 0x2150000 0x0 0x10000>;
-		interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
-		big-endian;
-		non-removable;
-		bus-width = <4>;
-		status = "disabled";
-	};
+		esdhc1: esdhc at 2150000 {
+			compatible = "fsl,esdhc";
+			reg = <0x0 0x2150000 0x0 0x10000>;
+			interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+			big-endian;
+			non-removable;
+			bus-width = <4>;
+			status = "disabled";
+		};
 
-	gpio0: gpio at 2300000 {
-		compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
-		reg = <0x0 0x2300000 0x0 0x10000>;
-		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-		little-endian;
-	};
+		gpio0: gpio at 2300000 {
+			compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+			reg = <0x0 0x2300000 0x0 0x10000>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			little-endian;
+		};
 
-	gpio1: gpio at 2310000 {
-		compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
-		reg = <0x0 0x2310000 0x0 0x10000>;
-		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-		little-endian;
-	};
+		gpio1: gpio at 2310000 {
+			compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+			reg = <0x0 0x2310000 0x0 0x10000>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			little-endian;
+		};
 
-	gpio2: gpio at 2320000 {
-		compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
-		reg = <0x0 0x2320000 0x0 0x10000>;
-		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-		little-endian;
-	};
+		gpio2: gpio at 2320000 {
+			compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+			reg = <0x0 0x2320000 0x0 0x10000>;
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			little-endian;
+		};
 
-	sata: sata at 3200000 {
-		compatible = "fsl,ls1028a-ahci";
-		reg = <0x0 0x3200000 0x0 0x10000	/* ccsr sata base */
-		       0x7 0x100520  0x0 0x4>;		/* ecc sata addr*/
-		reg-names = "sata-base", "ecc-addr";
-		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
+		sata: sata at 3200000 {
+			compatible = "fsl,ls1028a-ahci";
+			reg = <0x0 0x3200000 0x0 0x10000	/* ccsr sata base */
+				   0x7 0x100520  0x0 0x4>;		/* ecc sata addr*/
+			reg-names = "sata-base", "ecc-addr";
+			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
 
-	cluster1_core0_watchdog: wdt at c000000 {
-		compatible = "arm,sp805-wdt";
-		reg = <0x0 0xc000000 0x0 0x1000>;
+		cluster1_core0_watchdog: wdt at c000000 {
+			compatible = "arm,sp805-wdt";
+			reg = <0x0 0xc000000 0x0 0x1000>;
+		};
 	};
 };
-- 
2.30.2



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