[PATCH 3/5] arm: dts: Create common rz-g2-beacon-u-boot file

Adam Ford aford173 at gmail.com
Mon Dec 6 17:29:28 CET 2021


The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and
as such creates three different device trees and each of them
have a corresponding -u-boot.dtsi file which are basically
copies of each other.  Create a common include file to be
referenced by each of the respective board-u-boot.dtsi files
to reduce duplicate code and simplify support going forward.
This also restores some lost functionality from the device
tree re-sync and updates the MAINTAINER file to include all
beacon-renesom device tree files.

Signed-off-by: Adam Ford <aford173 at gmail.com>
---
 .../dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi | 32 +-------
 .../dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi | 32 +-------
 .../dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi | 42 +----------
 arch/arm/dts/rz-g2-beacon-u-boot.dtsi         | 75 +++++++++++++++++++
 board/beacon/beacon-rzg2m/MAINTAINERS         | 10 +++
 5 files changed, 91 insertions(+), 100 deletions(-)
 create mode 100644 arch/arm/dts/rz-g2-beacon-u-boot.dtsi

diff --git a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
index a0c0a7f35c..85336d5f3b 100644
--- a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
+++ b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
@@ -1,34 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright 2020 Compass Electronics Group, LLC
+ * Copyright 2021 LogicPD dba Beacon EmbeddedWorks
  */
 
-/ {
-	soc {
-		u-boot,dm-pre-reloc;
-	};
-};
-
-&cpg {
-	u-boot,dm-pre-reloc;
-};
-
-&extal_clk {
-	u-boot,dm-pre-reloc;
-};
-
-&prr {
-	u-boot,dm-pre-reloc;
-};
-
-&extalr_clk {
-	u-boot,dm-pre-reloc;
-};
-
-&sdhi0 {
-	/delete-property/ cd-gpios;
-};
-
-&sdhi2 {
-	status = "disabled";
-};
+#include "rz-g2-beacon-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
index a0c0a7f35c..85336d5f3b 100644
--- a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
+++ b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
@@ -1,34 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright 2020 Compass Electronics Group, LLC
+ * Copyright 2021 LogicPD dba Beacon EmbeddedWorks
  */
 
-/ {
-	soc {
-		u-boot,dm-pre-reloc;
-	};
-};
-
-&cpg {
-	u-boot,dm-pre-reloc;
-};
-
-&extal_clk {
-	u-boot,dm-pre-reloc;
-};
-
-&prr {
-	u-boot,dm-pre-reloc;
-};
-
-&extalr_clk {
-	u-boot,dm-pre-reloc;
-};
-
-&sdhi0 {
-	/delete-property/ cd-gpios;
-};
-
-&sdhi2 {
-	status = "disabled";
-};
+#include "rz-g2-beacon-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
index eef200af2d..85336d5f3b 100644
--- a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
+++ b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
@@ -1,44 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright 2020 Compass Electronics Group, LLC
+ * Copyright 2021 LogicPD dba Beacon EmbeddedWorks
  */
 
-/ {
-	soc {
-		u-boot,dm-pre-reloc;
-	};
-};
-
-&cpg {
-	u-boot,dm-pre-reloc;
-};
-
-&extal_clk {
-	u-boot,dm-pre-reloc;
-};
-
-&prr {
-	u-boot,dm-pre-reloc;
-};
-
-&extalr_clk {
-	u-boot,dm-pre-reloc;
-};
-
-&sdhi0 {
-	/delete-property/ cd-gpios;
-	sd-uhs-sdr12;
-	sd-uhs-sdr25;
-	sd-uhs-sdr104;
-	max-frequency = <208000000>;
-};
-
-&sdhi2 {
-	status = "disabled";
-};
-
-&sdhi3 {
-	mmc-ddr-1_8v;
-	mmc-hs200-1_8v;
-	mmc-hs400-1_8v;
-};
+#include "rz-g2-beacon-u-boot.dtsi"
diff --git a/arch/arm/dts/rz-g2-beacon-u-boot.dtsi b/arch/arm/dts/rz-g2-beacon-u-boot.dtsi
new file mode 100644
index 0000000000..ef0b96a71e
--- /dev/null
+++ b/arch/arm/dts/rz-g2-beacon-u-boot.dtsi
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2021 LogicPD dba Beacon EmbeddedWorks
+ */
+
+/ {
+	aliases {
+		spi0 = &rpc;
+	};
+
+	soc {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&cpg {
+	u-boot,dm-pre-reloc;
+};
+
+&ehci0 {
+	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>;
+};
+
+&ehci1 {
+	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>;
+};
+
+&extal_clk {
+	u-boot,dm-pre-reloc;
+};
+
+&extalr_clk {
+	u-boot,dm-pre-reloc;
+};
+
+&prr {
+	u-boot,dm-pre-reloc;
+};
+
+&rpc {
+	compatible = "renesas,rcar-gen3-rpc";
+	num-cs = <1>;
+	spi-max-frequency = <40000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	flash0: spi-flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+		compatible = "spi-flash", "jedec,spi-nor";
+		spi-max-frequency = <40000000>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+	};
+};
+
+&sdhi0 {
+	/delete-property/ cd-gpios;
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr104;
+	max-frequency = <208000000>;
+};
+
+&sdhi2 {
+	status = "disabled";
+};
+
+&sdhi3 {
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
+};
diff --git a/board/beacon/beacon-rzg2m/MAINTAINERS b/board/beacon/beacon-rzg2m/MAINTAINERS
index 77c4057ab0..f8042bb2c4 100644
--- a/board/beacon/beacon-rzg2m/MAINTAINERS
+++ b/board/beacon/beacon-rzg2m/MAINTAINERS
@@ -4,3 +4,13 @@ S:	Maintained
 F:	board/beacon/beacon-rzg2m/
 F:	include/configs/beacon-rzg2m.h
 F:	configs/rzg2_beacon_defconfig
+F:	arch/arm/dts/beacon-renesom-baseboard.dtsi
+F:	arch/arm/dts/beacon-renesom-som.dtsi
+F:	arch/arm/dts/r8a774a1-beacon-rzg2m-kit.dts
+F:	arch/arm/dts/r8a774b1-beacon-rzg2n-kit.dts
+F:	arch/arm/dts/r8a774e1-beacon-rzg2h-kit.dts
+F:	arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
+F:	arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
+F:	arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
+F:	arch/arm/dts/rz-g2-beacon-u-boot.dtsi
+
-- 
2.32.0



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