[PATCH 1/4] rockchip: gru: Set up SoC IO domain registers

[Simon Glass]

Hi Alper,

On Tue, 7 Dec 2021 at 13:31, Alper Nebi Yasak <alpernebiyasak at gmail.com> wrote:
>
> On 03/12/2021 06:31, Simon Glass wrote:
> > On Thu, 25 Nov 2021 at 10:40, Alper Nebi Yasak <alpernebiyasak at gmail.com> wrote:
> >> The RK3399 SoC needs to know the voltage value provided by some
> >> regulators, which is done by setting relevant register bits. Configure
> >> these the way other RK3399 boards do, but with values set in coreboot.
> >
> > What do you mean by values set in coreboot? We don't need that to run
> > here, do we?
>
> I meant that I wasn't blindly copying from other boards which have the
> same block (e.g. Pinebook Pro), but was using known-good values for Gru
> boards that coreboot also uses [1].
>
> I tested again and it looks like my Kevin works just as good without
> this patch, so I'll drop it.

Well I have no objection to the patch. I'd suggest saying 'but with
the same values as asre set in the equivalent code in coreboot'.

Regards,
Simon


> [1]
> https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/src/mainboard/google/gru/bootblock.c#19
>
> >> Signed-off-by: Alper Nebi Yasak <alpernebiyasak at gmail.com>
> >> ---
> >> There is a driver for this on Rockchip's repo, I managed to forward-port
> >> it and get it working. If that's more desirable than doing it per-board
> >> like this I can send that upstream (but I'd prefer to do it after this).
> >>
> >>  board/google/gru/gru.c | 54 ++++++++++++++++++++++++++++++++++++++++++
> >>  1 file changed, 54 insertions(+)