[PATCH 07/14] spi: dw: Mask all possible interrupts

Sean Anderson seanga2 at gmail.com
Thu Feb 4 05:51:05 CET 2021


On 1/31/21 7:34 PM, Sean Anderson wrote:
> DWC_SPI has more than 8 interrupts. Write to the whole IMR to mask
> everything.
> 
> Signed-off-by: Sean Anderson <seanga2 at gmail.com>
> ---
> 
>   drivers/spi/designware_spi.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
> index 519d6e32bd..29ec1503fd 100644
> --- a/drivers/spi/designware_spi.c
> +++ b/drivers/spi/designware_spi.c
> @@ -252,7 +252,7 @@ static int dw_spi_of_to_plat(struct udevice *bus)
>   static void spi_hw_init(struct udevice *bus, struct dw_spi_priv *priv)
>   {
>   	dw_write(priv, DW_SPI_SSIENR, 0);
> -	dw_write(priv, DW_SPI_IMR, 0xff);
> +	dw_write(priv, DW_SPI_IMR, 0xFFFFFFFF);

After further reviewing the datasheet, it turns out that interrupts are
masked by 0s in this register (and enabled by 1s). I'm not really sure
what this line was originally trying to accomplish. We never enable
interrupts globally, and we can just read from RISR if we need to get an
interrupt. Perhaps this patch should just remove this line?

--Sean

>   	dw_write(priv, DW_SPI_SSIENR, 1);
>   
>   	/*
> 



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