[RFC PATCH 12/13] riscv: k210: Increase SPI3 bus clock to CPU speed
Sean Anderson
seanga2 at gmail.com
Fri Feb 5 05:39:22 CET 2021
By default the SPI3 bus clock is ~100MHz, 1/4th of the CPU clock. This
causes decreased performance when accessing this peripheral.
Signed-off-by: Sean Anderson <seanga2 at gmail.com>
---
arch/riscv/dts/k210.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 81b04018c6..dac7c62289 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -600,6 +600,8 @@
interrupts = <4>;
clocks = <&sysclk K210_CLK_SPI3>;
clock-names = "ssi_clk";
+ assigned-clocks = <&sysclk K210_CLK_SPI3>;
+ assigned-clock-rates = <390000000>;
resets = <&sysrst K210_RST_SPI3>;
/* Could possibly go up to 200 MHz */
spi-max-frequency = <100000000>;
--
2.29.2
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