[PATCH 2/2] clk: imx8mp Enable EQOS clock

[Arendt, Steffen]

Enable SPI clock for imx8mp

Signed-off-by: Steffen Arendt <s.arendt at sensopart.de>
---

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b31afb31c0..c8a0b4549b 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -130,6 +130,15 @@ static const char *imx8mp_ecspi3_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1
                                           "sys_pll2_250m", "audio_pll2_out", };
 #endif

+static const char *imx8mp_enet_qos_sels[] = {"osc_24m", "sys_pll2_125m", "sys_pll2_50m",
+                                            "sys_pll2_100m", "sys_pll1_160m", "audio_pll1_out",
+                                            "video_pll1_out", "clk_ext4", };
+
+static const char *imx8mp_enet_qos_timer_sels[] = {"osc_24m", "sys_pll2_100m", "audio_pll1_out",
+                                                  "clk_ext1", "clk_ext2", "clk_ext3",
+                                                  "clk_ext4", "video_pll1_out", };
+
+
 static const char *imx8mp_usdhc1_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m",
                                           "sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m",
                                           "audio_pll2_out", "sys_pll1_100m", };
@@ -426,6 +435,12 @@ static int imx8mp_clk_probe(struct udevice *dev)
               imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0));
 #endif

+       clk_dm(IMX8MP_CLK_ENET_QOS,
+                       imx8m_clk_composite("enet_qos", imx8mp_enet_qos_sels, base + 0xa880));
+       clk_dm(IMX8MP_CLK_ENET_QOS_TIMER,
+                       imx8m_clk_composite("enet_qos_timer", imx8mp_enet_qos_timer_sels, base + 0xa900));
+
+
        return 0;
 }