[PATCH v2 19/38] pci: mpc85xx: Wrap LAW programming with CONFIG_FSL_LAW

[Priyanka Jain (OSS)]

>-----Original Message-----
>From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Bin Meng
>Sent: Monday, February 22, 2021 5:41 PM
>To: Priyanka Jain <priyanka.jain at nxp.com>
>Cc: Simon Glass <sjg at chromium.org>; Alexander Graf <agraf at csgraf.de>; U-
>Boot Mailing List <u-boot at lists.denx.de>; Tom Rini <trini at konsulko.com>; Heiko
>Schocher <hs at denx.de>
>Subject: Re: [PATCH v2 19/38] pci: mpc85xx: Wrap LAW programming with
>CONFIG_FSL_LAW
>
>Hi Priyanka,
>
>On Mon, Feb 22, 2021 at 5:06 PM Priyanka Jain <priyanka.jain at nxp.com> wrote:
>>
>>
>>
>> >-----Original Message-----
>> >From: Bin Meng <bmeng.cn at gmail.com>
>> >Sent: Thursday, February 18, 2021 9:28 PM
>> >To: Simon Glass <sjg at chromium.org>; Alexander Graf <agraf at csgraf.de>;
>> >Priyanka Jain <priyanka.jain at nxp.com>
>> >Cc: U-Boot Mailing List <u-boot at lists.denx.de>; Tom Rini
>> ><trini at konsulko.com>; Heiko Schocher <hs at denx.de>
>> >Subject: [PATCH v2 19/38] pci: mpc85xx: Wrap LAW programming with
>> >CONFIG_FSL_LAW
>> >
>> >For the QEMU ppce500 machine, LAW registers are not implemented hence
>> >CONFIG_FSL_LAW is not turned on and all LAW APIs are not available.
>> >We should wrap all LAW registers programming in the mpc85xx PCI
>> >driver with CONFIG_FSL_LAW.
>> >
>> >Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>> >---
>> >
>> >(no changes since v1)
>> >
>> > drivers/pci/pci_mpc85xx.c | 4 ++++
>> > 1 file changed, 4 insertions(+)
>> >
>> >diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c
>> >index ab6ff45..7387a1e 100644
>> >--- a/drivers/pci/pci_mpc85xx.c
>> >+++ b/drivers/pci/pci_mpc85xx.c
>> >@@ -46,6 +46,7 @@ static int mpc85xx_pci_dm_write_config(struct
>> >udevice *dev, pci_dev_t bdf,
>> >       return 0;
>> > }
>> >
>> >+#ifdef CONFIG_FSL_LAW
>> > static int
>> > mpc85xx_pci_dm_setup_laws(struct pci_region *io, struct pci_region *mem,
>> >                         struct pci_region *pre) @@ -68,6 +69,7 @@
>> >mpc85xx_pci_dm_setup_laws(struct pci_region *io, struct pci_region
>> >*mem,
>> >
>> >       return 0;
>> > }
>> >+#endif
>> >
>> > static int mpc85xx_pci_dm_probe(struct udevice *dev)  { @@ -85,7
>> >+87,9 @@ static int mpc85xx_pci_dm_probe(struct udevice *dev)
>> >               return -EINVAL;
>> >       }
>> >
>> >+#ifdef CONFIG_FSL_LAW
>> >       mpc85xx_pci_dm_setup_laws(io, mem, pre);
>> >+#endif
>> >
>> >       pcix = priv->cfg_addr;
>> >       /* BAR 1: memory */
>> >--
>> >2.7.4
>>
>> LAWs are required to be initialized while running on actual boards.
>> For QEMU, may be you can create config like CONFIG_FSL_BYPASS_LAW
>>
>
>As I mentioned in [1], CONFIG_FSL_LAW is already a Kconfig option and all 85xx
>SoCs have selected this config except QEMU, hence I don't think we need to
>create another config like CONFIG_FSL_BYPASS_LAW.
>
>[1] https://lists.denx.de/pipermail/u-boot/2021-February/441907.html
>
>Regards,
>Bin

Thanks for clarifying

Reviewed-by: Priyanka Jain <priyanka.jain at nxp.com>