[PATCH V2] net: dwc_eth_qos: Pad descriptors to cacheline size

[Marek Vasut]

On 1/6/21 10:06 PM, Stephen Warren wrote:
[...]

>>>> diff --git a/include/configs/tegra-common-post.h
>>>> b/include/configs/tegra-common-post.h
>>>
>>>> -#define CONFIG_SYS_NONCACHED_MEMORY    (1 << 20)    /* 1 MiB */
>>>
>>> This is wrong; there are other devices that are used on Tegra that
>>> require the noncached memory pool, e.g. the r8169 device.
>>
>> Isn't r8169 PCI device ? Shouldn't the r8169 driver be fixed instead ?
> 
> IIRC, the r8169 hardware doesn't have the same descriptor stride
> capability that the EQoS hardware does, so it isn't possible to fix that
> driver. Thierry Reding may remember more details since IIRC he worked on
> adding the noncached support to the r8169 driver; see d58acdcbfb33 "net:
> rtl8169: Use non-cached memory if available".

But rtl8169 is PCI device, should that even be affected at all ?

>>> I'll try and test this patch with the EQoS driver later today.
> 
> The testing passed:-)

Thank you