[PATCH v6 4/5] mtd: spi-nor-ids: Add XTX XT25F128B

[Chris Morgan]

On Wed, Jun 30, 2021 at 09:31:34PM +0800, Jon Lin wrote:
> From: Chris Morgan <macromorgan at hotmail.com>
> 
> Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
> this chip uses a continuation code which I cannot seem to parse, so
> there are possibly going to be collisions with chips that use the same
> manufacturer/ID.
> 
> Signed-off-by: Chris Morgan <macromorgan at hotmail.com>
> Signed-off-by: Jon Lin <jon.lin at rock-chips.com>
> ---
> 
> (no changes since v1)
> 
>  drivers/mtd/spi/Kconfig       | 6 ++++++
>  drivers/mtd/spi/spi-nor-ids.c | 8 ++++++++
>  2 files changed, 14 insertions(+)
> 
> diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
> index f8db8e5213..8c797d1e03 100644
> --- a/drivers/mtd/spi/Kconfig
> +++ b/drivers/mtd/spi/Kconfig
> @@ -162,6 +162,12 @@ config SPI_FLASH_XMC
>  	  Add support for various XMC (Wuhan Xinxin Semiconductor
>  	  Manufacturing Corp.) SPI flash chips (XM25xxx)
>  
> +config SPI_FLASH_XTX
> +	bool "XTX SPI flash support"
> +	help
> +	  Add support for various XTX (XTX Technology Limited)
> +	  SPI flash chips (XT25xxx).
> +
>  endif
>  
>  config SPI_FLASH_USE_4K_SECTORS
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index 2b57797954..bdecb3b837 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -336,6 +336,14 @@ const struct flash_info spi_nor_ids[] = {
>  	/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
>  	{ INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>  	{ INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> +#endif
> +#ifdef CONFIG_SPI_FLASH_XTX
> +	/* XTX Technology (Shenzhen) Limited */
> +	{
> +		INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256,
> +		     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> +		     SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)

Upon closer inspection of the datasheet, I'm almost certain the
SPI_NOR_HAS_LOCK or the SPI_NOR_HAS_TB doesn't need to be set here.
While the chip I think has these features, the bits are different than
what is expected by these flags. I've been testing the Linux and U-boot
drivers without these flags with no problems.

> +	},
>  #endif
>  	{ },
>  };
> -- 
> 2.17.1
> 
> 
>