[PATCH v3 7/9] board: phytec: phycore-imx8mp: Enable DVS1 control

Teresa Remmet t.remmet at phytec.de
Wed Jul 7 14:58:02 CEST 2021


Enable DVS1 control through PMIC_STBY_REQ.

Signed-off-by: Teresa Remmet <t.remmet at phytec.de>
Reviewed-by: Fabio Estevam <festevam at gmail.com>
---
No changes in v2 or v3.

 board/phytec/phycore_imx8mp/spl.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index 815ca9badcba..19c486e55174 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -66,7 +66,11 @@ int power_init_board(void)
 	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
 	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
 
-	/* set WDOG_B_CFG to cold reset */
+	/* Set BUCK1 DVS1 to suspend controlled through PMIC_STBY_REQ */
+	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
+	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+
+	/* Set WDOG_B_CFG to cold reset */
 	pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
 
 	return 0;
-- 
2.25.1



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