[PATCH v3 2/6] mmc: zynq_sdhci: Allow configuring zero Tap values

Jaehoon Chung jh80.chung at samsung.com
Mon Jul 12 00:23:55 CEST 2021


On 7/9/21 8:53 PM, Ashok Reddy Soma wrote:
> Allow configuring ITAP and OTAP values with zero to avoid failures in
> some cases (one of them is SD boot mode). Legacy, SDR12 modes require
> to program the ITAP and OTAP values as zero, whereas for SDR50 and SDR104
> modes ITAP value is zero.
> 
> In SD boot mode firmware configures the SD ITAP and OTAP values and
> in this case u-boot has to re-configure required tap values(including zero)
> based on the operating mode.
> 
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>


Reviewed-by: Jaehoon Chung <jh80.chung at samsung.com>

Best Regards,
Jaehoon Chung

> ---
> 
> (no changes since v1)
> 
>  drivers/mmc/zynq_sdhci.c | 16 ++++------------
>  1 file changed, 4 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
> index 5bad5cb9e7..f65a87a4e1 100644
> --- a/drivers/mmc/zynq_sdhci.c
> +++ b/drivers/mmc/zynq_sdhci.c
> @@ -198,9 +198,7 @@ static int sdhci_zynqmp_sdcardclk_set_phase(struct sdhci_host *host,
>  	 * ZynqMP does not set phase for <=25MHz clock.
>  	 * If degrees is zero, no need to do anything.
>  	 */
> -	if (SDHCI_GET_VERSION(host) < SDHCI_SPEC_300 ||
> -	    timing == MMC_TIMING_LEGACY ||
> -	    timing == MMC_TIMING_UHS_SDR12 || !degrees)
> +	if (SDHCI_GET_VERSION(host) < SDHCI_SPEC_300)
>  		return 0;
>  
>  	switch (timing) {
> @@ -253,9 +251,7 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct sdhci_host *host,
>  	 * ZynqMP does not set phase for <=25MHz clock.
>  	 * If degrees is zero, no need to do anything.
>  	 */
> -	if (SDHCI_GET_VERSION(host) < SDHCI_SPEC_300 ||
> -	    timing == MMC_TIMING_LEGACY ||
> -	    timing == MMC_TIMING_UHS_SDR12 || !degrees)
> +	if (SDHCI_GET_VERSION(host) < SDHCI_SPEC_300)
>  		return 0;
>  
>  	switch (timing) {
> @@ -307,9 +303,7 @@ static int sdhci_versal_sdcardclk_set_phase(struct sdhci_host *host,
>  	 * Versal does not set phase for <=25MHz clock.
>  	 * If degrees is zero, no need to do anything.
>  	 */
> -	if (SDHCI_GET_VERSION(host) < SDHCI_SPEC_300 ||
> -	    timing == MMC_TIMING_LEGACY ||
> -	    timing == MMC_TIMING_UHS_SDR12 || !degrees)
> +	if (SDHCI_GET_VERSION(host) < SDHCI_SPEC_300)
>  		return 0;
>  
>  	switch (timing) {
> @@ -370,9 +364,7 @@ static int sdhci_versal_sampleclk_set_phase(struct sdhci_host *host,
>  	 * Versal does not set phase for <=25MHz clock.
>  	 * If degrees is zero, no need to do anything.
>  	 */
> -	if (SDHCI_GET_VERSION(host) < SDHCI_SPEC_300 ||
> -	    timing == MMC_TIMING_LEGACY ||
> -	    timing == MMC_TIMING_UHS_SDR12 || !degrees)
> +	if (SDHCI_GET_VERSION(host) < SDHCI_SPEC_300)
>  		return 0;
>  
>  	switch (timing) {
> 



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