[PATCH v3 03/16] x86: Allow coreboot serial driver to guess the UART

[Bin Meng]

Hi Simon,

On Mon, Jun 28, 2021 at 7:51 AM Simon Glass <sjg at chromium.org> wrote:
>
> At present this driver relies on coreboot to provide information about
> the console UART. However if coreboot is not compiled with the UART
> enabled, the information is left out. This configuration is quite
> common, e.g. with shipping x86-based Chrome OS Chromebooks.
>
> Add a way to determine the UART settings in this case, using a
> hard-coded list of PCI IDs.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> (no changes since v1)
>
>  drivers/serial/serial_coreboot.c | 68 ++++++++++++++++++++++++++++----
>  include/pci_ids.h                |  1 +
>  2 files changed, 61 insertions(+), 8 deletions(-)
>

Based on discussion of the last version, this patch should be dropped.
I will see if I can drop it when applying.

Regards,
Bin