[PATCH 2/2] x86: dts: Define a default TSC timer frequency
Bin Meng
bmeng.cn at gmail.com
Sat Jul 31 04:00:23 CEST 2021
On Thu, Jul 29, 2021 at 9:32 AM Simon Glass <sjg at chromium.org> wrote:
>
> On Tue, 27 Jul 2021 at 22:00, Bin Meng <bmeng.cn at gmail.com> wrote:
> >
> > If for some reason, TSC timer frequency cannot be determined from
> > hardware, nor is it specified in the device tree, U-Boot will panic
> > resulting in endless reset during boot.
> >
> > Let's define a default TSC timer frequency using the Kconfig value
> > CONFIG_X86_TSC_TIMER_FREQ (note: #include must be used instead of
> > /include/ otherwise the macro is not pre-processed).
> >
> > Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> > ---
> >
> > arch/x86/dts/bayleybay.dts | 2 +-
> > arch/x86/dts/baytrail_som-db5800-som-6867.dts | 2 +-
> > arch/x86/dts/cherryhill.dts | 2 +-
> > arch/x86/dts/chromebook_coral.dts | 3 ++-
> > arch/x86/dts/chromebook_link.dts | 2 +-
> > arch/x86/dts/chromebook_samus.dts | 2 +-
> > arch/x86/dts/chromebox_panther.dts | 2 +-
> > arch/x86/dts/conga-qeval20-qa3-e3845.dts | 2 +-
> > arch/x86/dts/coreboot.dts | 7 ++-----
> > arch/x86/dts/cougarcanyon2.dts | 2 +-
> > arch/x86/dts/crownbay.dts | 2 +-
> > arch/x86/dts/edison.dts | 2 +-
> > arch/x86/dts/efi-x86_app.dts | 7 ++-----
> > arch/x86/dts/efi-x86_payload.dts | 7 ++-----
> > arch/x86/dts/galileo.dts | 7 ++-----
> > arch/x86/dts/minnowmax.dts | 2 +-
> > arch/x86/dts/qemu-x86_i440fx.dts | 6 +-----
> > arch/x86/dts/qemu-x86_q35.dts | 6 +-----
> > arch/x86/dts/slimbootloader.dts | 2 +-
> > arch/x86/dts/tsc_timer.dtsi | 1 +
> > 20 files changed, 25 insertions(+), 43 deletions(-)
>
> Reviewed-by: Simon Glass <sjg at chromium.org>
applied to u-boot-x86, thanks!
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