[PATCH 0/7] x86: Various fixes to MTRR and FSP codes

[Bin Meng]

At present Intel Crown Bay does not boot. This was caused by various
regression issues introduced when supporting FSP2, and some flaws in
MTRR codes.

With this series, U-Boot boot again on Intel Crown Bay board.

This series is available at u-boot-x86/crownbay for testing.


Bin Meng (7):
  x86: fsp: Don't program MTRR for DRAM
  x86: mtrr: Do not clear the unused ones in mtrr_commit()
  x86: mtrr: Skip MSRs that were already programmed in mtrr_commit()
  x86: mtrr: Abort if requested size is not power of 2
  x86: cmd: hob: Fix the command usage and help messages
  x86: cmd: hob: Fix display of resource type for system memory
  x86: fsp: Only FSP2 has INIT_PHASE_END_FIRMWARE

 arch/x86/cpu/mtrr.c           | 13 ++++++++-----
 arch/x86/include/asm/mtrr.h   |  7 ++++---
 arch/x86/lib/fsp/fsp_common.c | 16 +++++++++-------
 arch/x86/lib/fsp/fsp_dram.c   | 35 ++++++++++-------------------------
 cmd/x86/hob.c                 |  9 ++++-----
 5 files changed, 35 insertions(+), 45 deletions(-)

-- 
2.25.1