[RFC 0/5] rockchip_sfc: add support for Rockchip SFC

[Kever Yang]

Hi Chris,

On 2021/6/2 上午12:54, Chris Morgan wrote:
> On Tue, Jun 01, 2021 at 08:22:09PM +0800, Kever Yang wrote:
>> Add Yifeng from rockchip.
>>
>> Hi Chris,
>>
>>      First of all, I think you should remain the origin author info in the
>> signed-off.
> Okay, I can do that. Please note that since I submitted this I was
> asked to redo the upstream linux proposed driver to use the spi-mem
> framework. I think for now honestly I'd like to abandon this patch
> and resubmit a little later with one that is more or less the same
> (using the spi-mem framework) as the Linux driver.


This sounds better, then we can wait for driver with new framework.

Thanks,

- Kever

>
> https://patchwork.ozlabs.org/project/linux-mtd/patch/20210528170020.26219-2-macroalpha82@gmail.com/
>
>>
>> Hi Yifeng,
>>
>>      Please help to review this driver.
>>
>>
>> Thanks,
>>
>> - Kever
>>
>> On 2021/5/26 上午5:49, Chris Morgan wrote:
>>> From: Chris Morgan <macromorgan at hotmail.com>
>>>
>>> Requesting comments for a proposed patchset for adding the Rockchip
>>> serial flash controller to u-boot. The goal of these patches is to
>>> enable it for the Odroid Go Advance so that it may eventually boot
>>> exclusively from the SFC on mainline U-boot (I have tested this and
>>> it works).
>>>
>>> The specific help I need with this patch is:
>>>
>>> 1) I don't know the best way to upstream the XTX25F128B flash chip.
>>> This chip uses a continuation code for the manufacturer ID, however I
>>> cannot seem to find any way to actually read the continuation code.
>>> There is a risk of this driver, used as-is, to collide with another
>>> chip which has the same manufacturer ID with a different continuation
>>> code.
>>>
>>> 2) The Rockchip SFC driver itself (as it is mostly as-is from the BSP
>>> U-Boot sources) supports SPI NAND and chips of varying sizes, but my
>>> implementation only permits me to test with a single 128Mb flash chip.
>>> The driver itself does some checking on the bitlen in the routine
>>> rockchip_sfc_xfer() which is what is called for the dm_spi_ops.xfer.
>>> I'm not sure if there is a better way to do this. Additionally, I have
>>> to bit-shift the address written to the SFC as I suspect the value is
>>> meant to be left justified, but I never tested it further.
>>>
>>> Additionally, it might be worth mentioning but I noticed the Rockchip
>>> BROM will only boot the TPL/SPL off of the SFC if I write it to address
>>> 0x10000. This is not documented and different than the address looked
>>> at for SD card booting (512 * 64 = 0x8000 for SD Card booting). Also,
>>> like the SD card driver I can confirm that if DMA is enabled at the SPL
>>> stage A-TF seems to fail silently, then when Linux loads it hangs.
>>> There is an ifdef to force FIFO mode only in the SPL stage.
>>>
>>> Tested: Read (works)
>>> 	Write (works if you write to an erased sector)
>>> 	Erase (works)
>>> 	SPL Read (works if you edit the u-boot,spl-boot-order)
>>>
>>> Chris Morgan (5):
>>>     spi: rockchip_sfc: add support for Rockchip SFC
>>>     rockchip: px30: Add support for using SFC
>>>     rockchip: px30: add the serial flash controller
>>>     mtd: spi-nor-ids: Add XTX XT25F128B
>>>     rockchip: px30: add support for SFC for Odroid Go Advance
>>>
>>>    arch/arm/dts/px30.dtsi                     |  38 ++
>>>    arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi |  10 +-
>>>    arch/arm/dts/rk3326-odroid-go2.dts         |  22 +
>>>    arch/arm/mach-rockchip/px30/px30.c         |  64 ++
>>>    drivers/mtd/spi/Kconfig                    |   6 +
>>>    drivers/mtd/spi/spi-nor-ids.c              |   8 +
>>>    drivers/spi/Kconfig                        |   8 +
>>>    drivers/spi/Makefile                       |   1 +
>>>    drivers/spi/rockchip_sfc.c                 | 652 +++++++++++++++++++++
>>>    9 files changed, 926 insertions(+), 1 deletion(-)
>>>    create mode 100644 drivers/spi/rockchip_sfc.c
>>>
>>
>