[PATCHv3 3/3] pci: pcie_dw_rockchip: Replace msleep occurences by udelay

[Anand Moon]

Replace msleep occurences by udelay.

drivers/pci/pcie_dw_rockchip.c:254:3: warning: implicit
     declaration of function 'msleep' [-Wimplicit-function-declaration]

Cc: Patrick Wildt <patrick at blueri.se>
Cc: Neil Armstrong <narmstrong at baylibre.com>
Cc: Kever Yang <kever.yang at rock-chips.com>
Signed-off-by: Anand Moon <linux.amoon at gmail.com>
---
V2: drop the msleep macro.
---
 drivers/pci/pcie_dw_rockchip.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 4e448c0a3d..039266a357 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -62,6 +62,7 @@ struct rk_pcie {
 
 /* Parameters for the waiting for #perst signal */
 #define PERST_WAIT_MS			1000
+#define MACRO_US			1000
 
 static int rk_pcie_read(void __iomem *addr, int size, u32 *val)
 {
@@ -249,7 +250,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
 		 * some wired devices need much more, such as 600ms.
 		 * Add a enough delay to cover all cases.
 		 */
-		msleep(PERST_WAIT_MS);
+		udelay(PERST_WAIT_MS);
 		dm_gpio_set_value(&priv->rst_gpio, 1);
 	}
 
@@ -271,12 +272,12 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
 		dev_info(priv->dw.dev, "PCIe Linking... LTSSM is 0x%x\n",
 			 rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
 		rk_pcie_debug_dump(priv);
-		msleep(1000);
+		udelay(PERST_WAIT_MS * MACRO_US);
 	}
 
 	dev_err(priv->dw.dev, "PCIe-%d Link Fail\n", dev_seq(priv->dw.dev));
 	/* Link maybe in Gen switch recovery but we need to wait more 1s */
-	msleep(1000);
+	udelay(PERST_WAIT_MS * MACRO_US);
 	return -EIO;
 }
 
@@ -296,7 +297,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
 		}
 	}
 
-	msleep(1000);
+	udelay(PERST_WAIT_MS * MACRO_US);
 
 	ret = generic_phy_init(&priv->phy);
 	if (ret) {
-- 
2.31.1