[PATCH v3 0/5] rockchip_sfc: add support for Rockchip SFC

Chris Morgan macroalpha82 at gmail.com
Tue Jun 8 20:10:55 CEST 2021


From: Chris Morgan <macromorgan at hotmail.com>

Changes from v2:
 - Resending due to glitch with patch file truncating final two lines
   on patch 1/5 and incorrect patch version number on patch 5/5.

Changes from v1:
 - Reworked code to utilize spi-mem framework, and based it closely
   off of work in progress code for mainline Linux.
 - Removed DMA, as it didn't offer much performance benefit for
   booting (in my test cases), added complexity to the code, and
   interfered with A-TF.
 - Updated the names of the bindings to match the work in progress
   Linux code.
 - Moved alias to u-boot specific device-tree for Odroid Go Advance.
   Alias is updated with the spi0 node pointing to the SFC to
   help the sf command as well as facilitate booting from the SFC.
 - Note 2 below no longer applies, as rebasing this off of upstream
   code should allow the device to work for NAND, and by utilizing
   the spi-mem framework it no longer has to extract the parameters
   from the dm_spi_ops.xfer.

Requesting comments for a proposed patchset for adding the Rockchip
serial flash controller to u-boot. The goal of these patches is to
enable it for the Odroid Go Advance so that it may eventually boot
exclusively from the SFC on mainline U-boot (I have tested this and
it works).

The specific help I need with this patch is:

1) I don't know the best way to upstream the XTX25F128B flash chip.
This chip uses a continuation code for the manufacturer ID, however I
cannot seem to find any way to actually read the continuation code.
There is a risk of this driver, used as-is, to collide with another
chip which has the same manufacturer ID with a different continuation
code.

2) The Rockchip SFC driver itself (as it is mostly as-is from the BSP
U-Boot sources) supports SPI NAND and chips of varying sizes, but my
implementation only permits me to test with a single 128Mb flash chip.
The driver itself does some checking on the bitlen in the routine
rockchip_sfc_xfer() which is what is called for the dm_spi_ops.xfer.
I'm not sure if there is a better way to do this. Additionally, I have
to bit-shift the address written to the SFC as I suspect the value is
meant to be left justified, but I never tested it further.

Additionally, it might be worth mentioning but I noticed the Rockchip
BROM will only boot the TPL/SPL off of the SFC if I write it to address
0x10000. This is not documented and different than the address looked
at for SD card booting (512 * 64 = 0x8000 for SD Card booting). Also,
like the SD card driver I can confirm that if DMA is enabled at the SPL
stage A-TF seems to fail silently, then when Linux loads it hangs.
There is an ifdef to force FIFO mode only in the SPL stage.

Tested: Read (works)
	Write (works if you write to an erased sector)
	Erase (works)
	SPL Read (works if you edit the u-boot,spl-boot-order)

Chris Morgan (5):
  spi: rockchip_sfc: add support for Rockchip SFC
  rockchip: px30: Add support for using SFC
  rockchip: px30: add the serial flash controller
  mtd: spi-nor-ids: Add XTX XT25F128B
  rockchip: px30: add support for SFC for Odroid Go Advance

 arch/arm/dts/px30.dtsi                     |  38 ++
 arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi |  17 +
 arch/arm/dts/rk3326-odroid-go2.dts         |  16 +
 arch/arm/mach-rockchip/px30/px30.c         |  64 +++
 drivers/mtd/spi/Kconfig                    |   6 +
 drivers/mtd/spi/spi-nor-ids.c              |   8 +
 drivers/spi/Kconfig                        |   8 +
 drivers/spi/Makefile                       |   1 +
 drivers/spi/rockchip_sfc.c                 | 495 +++++++++++++++++++++
 9 files changed, 653 insertions(+)
 create mode 100644 drivers/spi/rockchip_sfc.c

-- 
2.25.1



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