[PATCH v1] arm: dts: ls1021a.dtsi: Fix invalid reg on gpio nodes

[Lasse Klok Mikkelsen]

Address and size cells on SOC are set to 1. But gpio nodes are specified
with 2 cells. This fixes the gpio nodes to correct cells.

Signed-off-by: Lasse Klok Mikkelsen <lkmi at prevas.dk>
---
 arch/arm/dts/ls1021a.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 7b99ce02b3..7ba2dd2269 100644
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -100,7 +100,7 @@
 
 		gpio0: gpio at 2300000 {
 			compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
-			reg = <0x0 0x2300000 0x0 0x10000>;
+			reg = <0x2300000 0x10000>;
 			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -110,7 +110,7 @@
 
 		gpio1: gpio at 2310000 {
 			compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
-			reg = <0x0 0x2310000 0x0 0x10000>;
+			reg = <0x2310000 0x10000>;
 			interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -120,7 +120,7 @@
 
 		gpio2: gpio at 2320000 {
 			compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
-			reg = <0x0 0x2320000 0x0 0x10000>;
+			reg = <0x2320000 0x10000>;
 			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -130,7 +130,7 @@
 
 		gpio3: gpio at 2330000 {
 			compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
-			reg = <0x0 0x2330000 0x0 0x10000>;
+			reg = <0x2330000 0x10000>;
 			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 			gpio-controller;
 			#gpio-cells = <2>;
-- 
2.27.0