[PATCH 1/1] net: sun8i-emac: fix MDIO frequency

[Ramon Fried]

On Thu, Jun 3, 2021 at 10:52 AM Heinrich Schuchardt <xypron.glpk at gmx.de> wrote:
>
> Commit 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency") leads to
> network failure on the OrangePi PC.
>
>     => dhcp
>     sun8i_emac_eth_start: Timeout
>
> According to the commit message the change of the MDIO frequency is only
> required for external PHYs.
>
> Fixes: 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency")
> Signed-off-by: Heinrich Schuchardt <xypron.glpk at gmx.de>
> ---
>  drivers/net/sun8i_emac.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
> index 5a1b38bf80..d7553fe163 100644
> --- a/drivers/net/sun8i_emac.c
> +++ b/drivers/net/sun8i_emac.c
> @@ -211,7 +211,9 @@ static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
>          * The EMAC clock is either 200 or 300 MHz, so we need a divider
>          * of 128 to get the MDIO frequency below the required 2.5 MHz.
>          */
> -       mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
> +       if (!priv->use_internal_phy)
> +               mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
> +                          MDIO_CMD_MII_CLK_CSR_SHIFT;
>
>         mii_cmd |= MDIO_CMD_MII_BUSY;
>
> @@ -242,7 +244,9 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
>          * The EMAC clock is either 200 or 300 MHz, so we need a divider
>          * of 128 to get the MDIO frequency below the required 2.5 MHz.
>          */
> -       mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
> +       if (!priv->use_internal_phy)
> +               mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
> +                          MDIO_CMD_MII_CLK_CSR_SHIFT;
>
>         mii_cmd |= MDIO_CMD_MII_WRITE;
>         mii_cmd |= MDIO_CMD_MII_BUSY;
> --
> 2.31.0
>
Reviewed-by: Ramon Fried <rfried.dev at gmail.com>