[PATCH] configs: OrangePi PC2: Update defaults

[Andre Przywara]

On Sat, 12 Jun 2021 07:50:27 +0200
Jernej Škrabec <jernej.skrabec at gmail.com> wrote:

Hi,

> Dne ponedeljek, 07. junij 2021 ob 19:42:45 CEST je Jernej Skrabec napisal(a):
> > OrangePi PC2 board has DRAM with ODT, so enable it. ZQ value is also
> > slightly different in vendor images, so update it as well. H5 SoC is
> > also connected to voltage regulator. It's default value is pretty low,
> > so in order to avoid instability, enable driver for it and set it to
> > appropriate voltage.
> > 
> > Signed-off-by: Jernej Skrabec <jernej.skrabec at gmail.com>
> > ---
> >  configs/orangepi_pc2_defconfig | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
> > index f72ffe27b26c..5e4cca793f53 100644
> > --- a/configs/orangepi_pc2_defconfig
> > +++ b/configs/orangepi_pc2_defconfig
> > @@ -3,13 +3,15 @@ CONFIG_ARCH_SUNXI=y
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN50I_H5=y
> >  CONFIG_DRAM_CLK=672
> > -CONFIG_DRAM_ZQ=3881977
> > -# CONFIG_DRAM_ODT_EN is not set
> > +CONFIG_DRAM_ZQ=4145117
> >  CONFIG_MACPWR="PD6"
> >  CONFIG_SPL_SPI_SUNXI=y
> > +CONFIG_SPL_I2C_SUPPORT=y
> >  CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2"
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SUN8I_EMAC=y
> > +CONFIG_SY8106A_POWER=y
> > +CONFIG_SY8106A_VOUT1_VOLT=1100  
> 
> I'm not sure if voltage regulator adjustment needs to be enabled. By default, 
> it's set to 1.1 V using resistor divider. However, it can be still needed if 
> board is rebooted and OS set it to lower value before reboot.

Yeah, I had a similar train of thoughts: originally I though we don't
need it, because of the resistor divider providing a good default
voltage. But indeed if we reset from a lower p-state (either by chance
or because of say the powersave governor being active), I really see the
lowest voltage (1.0V) being still set in when back in U-Boot, which
could lead to instabilities if the CPU runs at the 816 MHz we set the
PLL to.
So enabling the regulator sounds indicated, as we set the CPU frequency
as well. This is especially critical when the OS doesn't use DVFS.

Because of this I am inclined to take the regulator part now.

For the ODT change, I will queue this for the next release.

Thanks,
Andre.

> 
> Best regards,
> Jernej
> 
> >  CONFIG_USB_EHCI_HCD=y
> >  CONFIG_USB_OHCI_HCD=y
> >  CONFIG_USB_MUSB_GADGET=y
> > -- 
> > 2.31.1
> > 
> >   
> 
> 
>