[PATCH v3 06/11] clk: k210: Don't set PLL rates if we are already at the correct rate
Leo Liang
ycliang at andestech.com
Wed Jun 16 03:58:39 CEST 2021
On Fri, Jun 11, 2021 at 12:16:12PM +0800, Sean Anderson wrote:
> This speeds up boot by preventing multiple reconfigurations of the PLLs.
>
> Signed-off-by: Sean Anderson <seanga2 at gmail.com>
> ---
>
> (no changes since v1)
>
> drivers/clk/kendryte/clk.c | 15 ++++++++-------
> 1 file changed, 8 insertions(+), 7 deletions(-)
Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>
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