[PATCH v2 2/2] arm: dts: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication

[Aswath Govindraju]

Hi Suman,

On 16/06/21 10:49 pm, Suman Anna wrote:
> On 6/16/21 11:38 AM, Aswath Govindraju wrote:
>> The final 128KB in SRAM is reserved by default for DMSC-lite code and
>> secure proxy communication buffer. The memory region used for DMSC-lite
>> code can be optionally freed up by secure firmware API[1]. However, the
>> buffer for secure proxy communication is not configurable. This default
>> hardware configuration is unique for AM64.
>>
>> Therefore, indicate the area reserved for DMSC-lite code and secure proxy
>> communication buffer in the oc_sram device tree node.
>>
>> [1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover
>>
>> Signed-off-by: Aswath Govindraju <a-govindraju at ti.com>
> 
> Acked-by: Suman Anna <s-anna at ti.com>
> 
> You may actually want to reorder so that this patch is first.
> 

Thank you for the Acked-by.

The reason why I chose this order is that patch 1, is a fixes patch and
that has to apply cleanly on top of previous commit.

Thanks,
Aswath


> regards
> Suman
> 
>> ---
>>  arch/arm/dts/k3-am64-main.dtsi | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>>
>> diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
>> index f68b969a2e9b..c5af2ffb8ee1 100644
>> --- a/arch/arm/dts/k3-am64-main.dtsi
>> +++ b/arch/arm/dts/k3-am64-main.dtsi
>> @@ -16,6 +16,14 @@
>>  		tfa-sram at 1c0000 {
>>  			reg = <0x1c0000 0x20000>;
>>  		};
>> +
>> +		dmsc-sram at 1e0000 {
>> +			reg = <0x1e0000 0x1c000>;
>> +		};
>> +
>> +		sproxy-sram at 1fc000 {
>> +			reg = <0x1fc000 0x4000>;
>> +		};
>>  	};
>>  
>>  	gic500: interrupt-controller at 1800000 {
>>
>