[Uboot-stm32] [PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
Patrice CHOTARD
patrice.chotard at foss.st.com
Fri Jun 18 10:00:14 CEST 2021
On 6/3/21 9:35 AM, Patrice CHOTARD wrote:
> Hi Grzegorz
>
> On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
>> Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
>> corresponding Linux kernel device tree.
>>
>> Signed-off-by: Grzegorz Szymaszek <gszymaszek at short.pl>
>> Cc: Patrice Chotard <patrice.chotard at foss.st.com>
>> Cc: Patrick Delaunay <patrick.delaunay at foss.st.com>
>> ---
>> Changes for v2:
>> - rebased on current master
>> - added a short commit message body
>>
>> arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> index 583812f137..1510a5b364 100644
>> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> @@ -274,6 +274,7 @@
>> bus-width = <8>;
>> vmmc-supply = <&v3v3>;
>> vqmmc-supply = <&vdd>;
>> + mmc-ddr-3_3v;
>> status = "okay";
>> };
>>
>>
>
> Reviewed-by: Patrice Chotard <patrice.chotard at foss.st.com>
>
> Thanks
> Patrice
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Applied on u-boot-stm32/next
Thanks
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