[v2 04/17] arm: socfpga: Add handoff data support for Intel N5X device

[Simon Glass]

Hi,

On Mon, 31 May 2021 at 05:39, Chee, Tien Fong <tien.fong.chee at intel.com> wrote:
>
> Hi Ley Foon,
>
> > -----Original Message-----
> > From: Ley Foon Tan <lftan.linux at gmail.com>
> > Sent: Friday, 14 May, 2021 5:13 PM
> > To: Lim, Elly Siew Chin <elly.siew.chin.lim at intel.com>
> > Cc: ZY - u-boot <u-boot at lists.denx.de>; Marek Vasut <marex at denx.de>;
> > Tan, Ley Foon <ley.foon.tan at intel.com>; See, Chin Liang
> > <chin.liang.see at intel.com>; Simon Goldschmidt
> > <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> > <tien.fong.chee at intel.com>; Westergreen, Dalon
> > <dalon.westergreen at intel.com>; Simon Glass <sjg at chromium.org>; Gan,
> > Yau Wai <yau.wai.gan at intel.com>
> > Subject: Re: [v2 04/17] arm: socfpga: Add handoff data support for Intel N5X
> > device
> >
> > On Fri, Apr 30, 2021 at 3:39 PM Siew Chin Lim <elly.siew.chin.lim at intel.com>
> > wrote:
> > >
> > > N5X support both HPS handoff data and DDR handoff data.
> > > Existing HPS handoff functions are restructured to support both
> > > existing devices and N5X device.
> > >
> > > Signed-off-by: Siew Chin Lim <elly.siew.chin.lim at intel.com>
> > > Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
> > >
> > > ---
> > > v2:
> > > - Enabled auto detect the endianness from the magic word
> > > - Merged and simplifying the big and little endian flow
> > > ---
> > >  .../mach-socfpga/include/mach/handoff_soc64.h |  38 +++++-
> > > arch/arm/mach-socfpga/system_manager_soc64.c  |  18 +--
> > >  arch/arm/mach-socfpga/wrap_handoff_soc64.c    | 126 +++++++++++++--
> > ---
> > >  3 files changed, 136 insertions(+), 46 deletions(-)

I'm not too clear on what is happening here, but have you looked at
SPL_HANDOFF or BLOBLIST?

Regards,
Simon