[PATCH] arm: dts: stm32mp15: alignment with v5.13
Patrick Delaunay
patrick.delaunay at foss.st.com
Tue Jun 29 12:01:07 CEST 2021
Device tree alignment with Linux kernel v5.13
- ARM: dts: stm32: Add PTP clock to Ethernet controller
- ARM: dts: stm32: enable the analog filter for all I2C nodes in
stm32mp151
- ARM: dts: stm32: fix usart 2 & 3 pinconf to wake up with flow control
- ARM: dts: stm32: Add wakeup management on stm32mp15x UART nodes
- ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
- ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux
- ARM: dts: stm32: Rename mmc controller nodes to mmc@
- ARM: dts: stm32: Add additional init state for SDMMC1 pins
Signed-off-by: Patrick Delaunay <patrick.delaunay at foss.st.com>
---
arch/arm/dts/stm32mp15-pinctrl.dtsi | 61 +++++++++++++++++++++++++++--
arch/arm/dts/stm32mp151.dtsi | 39 ++++++++++++------
2 files changed, 86 insertions(+), 14 deletions(-)
diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi
index 20a59e8f7a..060baa8b7e 100644
--- a/arch/arm/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi
@@ -1273,6 +1273,18 @@
};
};
+ sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
+ <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
+ <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
+ <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-disable;
+ };
+ };
+
sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
@@ -1299,6 +1311,17 @@
};
};
+ sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
+ <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
+ <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ };
+
sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
@@ -1868,10 +1891,15 @@
usart2_idle_pins_c: usart2-idle-2 {
pins1 {
pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
- <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
<STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
};
pins2 {
+ pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <3>;
+ };
+ pins3 {
pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
bias-disable;
};
@@ -1917,10 +1945,15 @@
usart3_idle_pins_b: usart3-idle-1 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
<STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
};
pins2 {
+ pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins3 {
pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
bias-disable;
};
@@ -1953,10 +1986,15 @@
usart3_idle_pins_c: usart3-idle-2 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
- <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
<STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
};
pins2 {
+ pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins3 {
pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
bias-disable;
};
@@ -2018,6 +2056,23 @@
};
};
+ i2c6_pins_a: i2c6-0 {
+ pins {
+ pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
+ <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
+ i2c6_sleep_pins_a: i2c6-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
+ <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
+ };
+ };
+
spi1_pins_a: spi1-0 {
pins1 {
pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
index b564fc6269..177927d14e 100644
--- a/arch/arm/dts/stm32mp151.dtsi
+++ b/arch/arm/dts/stm32mp151.dtsi
@@ -470,32 +470,36 @@
usart2: serial at 4000e000 {
compatible = "st,stm32h7-uart";
reg = <0x4000e000 0x400>;
- interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc USART2_K>;
+ wakeup-source;
status = "disabled";
};
usart3: serial at 4000f000 {
compatible = "st,stm32h7-uart";
reg = <0x4000f000 0x400>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc USART3_K>;
+ wakeup-source;
status = "disabled";
};
uart4: serial at 40010000 {
compatible = "st,stm32h7-uart";
reg = <0x40010000 0x400>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc UART4_K>;
+ wakeup-source;
status = "disabled";
};
uart5: serial at 40011000 {
compatible = "st,stm32h7-uart";
reg = <0x40011000 0x400>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc UART5_K>;
+ wakeup-source;
status = "disabled";
};
@@ -511,6 +515,7 @@
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x1>;
wakeup-source;
+ i2c-analog-filter;
status = "disabled";
};
@@ -526,6 +531,7 @@
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x2>;
wakeup-source;
+ i2c-analog-filter;
status = "disabled";
};
@@ -541,6 +547,7 @@
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x4>;
wakeup-source;
+ i2c-analog-filter;
status = "disabled";
};
@@ -556,6 +563,7 @@
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x10>;
wakeup-source;
+ i2c-analog-filter;
status = "disabled";
};
@@ -595,16 +603,18 @@
uart7: serial at 40018000 {
compatible = "st,stm32h7-uart";
reg = <0x40018000 0x400>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc UART7_K>;
+ wakeup-source;
status = "disabled";
};
uart8: serial at 40019000 {
compatible = "st,stm32h7-uart";
reg = <0x40019000 0x400>;
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc UART8_K>;
+ wakeup-source;
status = "disabled";
};
@@ -683,8 +693,9 @@
usart6: serial at 44003000 {
compatible = "st,stm32h7-uart";
reg = <0x44003000 0x400>;
- interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc USART6_K>;
+ wakeup-source;
status = "disabled";
};
@@ -1065,7 +1076,7 @@
};
};
- sdmmc3: sdmmc at 48004000 {
+ sdmmc3: mmc at 48004000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00253180>;
reg = <0x48004000 0x400>;
@@ -1398,7 +1409,7 @@
status = "disabled";
};
- sdmmc1: sdmmc at 58005000 {
+ sdmmc1: mmc at 58005000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00253180>;
reg = <0x58005000 0x1000>;
@@ -1413,7 +1424,7 @@
status = "disabled";
};
- sdmmc2: sdmmc at 58007000 {
+ sdmmc2: mmc at 58007000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00253180>;
reg = <0x58007000 0x1000>;
@@ -1451,11 +1462,13 @@
"mac-clk-tx",
"mac-clk-rx",
"eth-ck",
+ "ptp_ref",
"ethstp";
clocks = <&rcc ETHMAC>,
<&rcc ETHTX>,
<&rcc ETHRX>,
<&rcc ETHCK_K>,
+ <&rcc ETHPTP_K>,
<&rcc ETHSTP>;
st,syscon = <&syscfg 0x4>;
snps,mixed-burst;
@@ -1512,6 +1525,7 @@
usbphyc: usbphyc at 5a006000 {
#address-cells = <1>;
#size-cells = <0>;
+ #clock-cells = <0>;
compatible = "st,stm32mp1-usbphyc";
reg = <0x5a006000 0x1000>;
clocks = <&rcc USBPHY_K>;
@@ -1534,8 +1548,9 @@
usart1: serial at 5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc USART1_K>;
+ wakeup-source;
status = "disabled";
};
@@ -1565,6 +1580,7 @@
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x8>;
wakeup-source;
+ i2c-analog-filter;
status = "disabled";
};
@@ -1605,6 +1621,7 @@
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x20>;
wakeup-source;
+ i2c-analog-filter;
status = "disabled";
};
--
2.25.1
More information about the U-Boot
mailing list