[PATCH] armv8: Update erratum number to align with doc
Ran Wang
ran.wang_1 at nxp.com
Thu May 6 04:42:37 CEST 2021
Change the USB erratum number A-050106 to A-050204 as A-050106 is
a duplicate and never be published.
Fixes 0cfa00cdb94 (“armv8: Add workaround for USB erratum A-050106”)
Signed-off-by: Ran Wang <ran.wang_1 at nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 ++++----
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9d1ba4c771..b15544030c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -223,7 +223,7 @@ config ARCH_LX2162A
select SYS_FSL_DDR_VER_50
select SYS_FSL_EC1
select SYS_FSL_EC2
- select SYS_FSL_ERRATUM_A050106
+ select SYS_FSL_ERRATUM_A050204
select SYS_FSL_HAS_RGMII
select SYS_FSL_HAS_SEC
select SYS_FSL_HAS_CCN508
@@ -253,7 +253,7 @@ config ARCH_LX2160A
select SYS_FSL_DDR_VER_50
select SYS_FSL_EC1
select SYS_FSL_EC2
- select SYS_FSL_ERRATUM_A050106
+ select SYS_FSL_ERRATUM_A050204
select SYS_FSL_HAS_RGMII
select SYS_FSL_HAS_SEC
select SYS_FSL_HAS_CCN508
@@ -371,8 +371,8 @@ config SYS_FSL_ERRATUM_A009008
config SYS_FSL_ERRATUM_A009798
bool "Workaround for USB PHY erratum A009798"
-config SYS_FSL_ERRATUM_A050106
- bool "Workaround for USB PHY erratum A050106"
+config SYS_FSL_ERRATUM_A050204
+ bool "Workaround for USB PHY erratum A050204"
help
USB3.0 Receiver needs to enable fixed equalization
for each of PHY instances in an SOC. This is similar
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 7553b5bce2..b7e583859a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -218,7 +218,7 @@ static void erratum_a009007(void)
}
#if defined(CONFIG_FSL_LSCH3)
-static void erratum_a050106(void)
+static void erratum_a050204(void)
{
#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
void __iomem *dcsr = (void __iomem *)DCSR_BASE;
@@ -378,7 +378,7 @@ void fsl_lsch3_early_init_f(void)
erratum_a009798();
erratum_a008997();
erratum_a009007();
- erratum_a050106();
+ erratum_a050204();
#ifdef CONFIG_CHAIN_OF_TRUST
/* In case of Secure Boot, the IBR configures the SMMU
* to allow only Secure transactions.
--
2.25.1
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