[PATCH v1 5/6] net: mv88e61xx: Set proper offset when R0_LED/ADDR4 is set on bootstrap

[Ramon Fried]

On Wed, Mar 17, 2021 at 4:14 PM Lukasz Majewski <lukma at denx.de> wrote:
>
> The mv88e61xx driver need to be adjusted to handle situation when
> switch MDIO addresses are switched by offset (0x10 in this case).
>
> Signed-off-by: Lukasz Majewski <lukma at denx.de>
> ---
>
>  drivers/net/phy/mv88e61xx.c | 25 ++++++++++++++++++-------
>  1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c
> index 3d846b89fd12..325d5b56135f 100644
> --- a/drivers/net/phy/mv88e61xx.c
> +++ b/drivers/net/phy/mv88e61xx.c
> @@ -45,7 +45,6 @@
>  #define PORT_MASK(port_count)          ((1 << (port_count)) - 1)
>
>  /* Device addresses */
> -#define DEVADDR_PHY(p)                 (p)
>  #define DEVADDR_SERDES                 0x0F
>
>  /* SMI indirection registers for multichip addressing mode */
> @@ -414,7 +413,7 @@ static int mv88e61xx_phy_write_indirect(struct mii_dev *smi_wrapper, int dev,
>  /* Wrapper function to make calls to phy_read_indirect simpler */
>  static int mv88e61xx_phy_read(struct phy_device *phydev, int phy, int reg)
>  {
> -       return mv88e61xx_phy_read_indirect(phydev->bus, DEVADDR_PHY(phy),
> +       return mv88e61xx_phy_read_indirect(phydev->bus, phydev->addr,
>                                            MDIO_DEVAD_NONE, reg);
>  }
>
> @@ -422,7 +421,7 @@ static int mv88e61xx_phy_read(struct phy_device *phydev, int phy, int reg)
>  static int mv88e61xx_phy_write(struct phy_device *phydev, int phy,
>                 int reg, u16 val)
>  {
> -       return mv88e61xx_phy_write_indirect(phydev->bus, DEVADDR_PHY(phy),
> +       return mv88e61xx_phy_write_indirect(phydev->bus, phydev->addr,
>                                             MDIO_DEVAD_NONE, reg, val);
>  }
>
> @@ -926,12 +925,21 @@ static int mv88e61xx_priv_reg_offs_pre_init(struct phy_device *phydev)
>         /*
>          * Now try via port registers with device address 0x08
>          * (88E6020 and compatible switches).
> +        *
> +        * When R0_LED/ADDR4 is set during bootstrap, one needs
> +        * to add 0x10 offset to switch addresses.
> +        *
> +        * The phydev->addr is set according to device tree address
> +        * of MDIO accessible device:
> +        *
> +        * When on board RO_LED/ADDR4 = 1 -> 0x10
> +        *                              0 -> 0x0
>          */
> -       priv->port_reg_base = 0x08;
> +       priv->port_reg_base = 0x08 + phydev->addr;
>         priv->id = mv88e61xx_get_switch_id(phydev);
>         if (priv->id != 0xfff0) {
> -               priv->global1 = 0x0F;
> -               priv->global2 = 0x07;
> +               priv->global1 = 0x0F + phydev->addr;
> +               priv->global2 = 0x07 + phydev->addr;
>                 return 0;
>         }
>
> @@ -1090,7 +1098,10 @@ static int mv88e61xx_phy_config(struct phy_device *phydev)
>
>         for (i = 0; i < priv->port_count; i++) {
>                 if ((1 << i) & CONFIG_MV88E61XX_PHY_PORTS) {
> -                       phydev->addr = i;
> +                       if (phydev->addr)
> +                               phydev->addr += i;
> +                       else
> +                               phydev->addr = i;
>
>                         res = mv88e61xx_phy_enable(phydev, i);
>                         if (res < 0) {
> --
> 2.20.1
>
Reviewed-by: Ramon Fried <rfried.dev at gmail.com>